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Dive into the research topics where Dragan Podlesnik is active.

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Featured researches published by Dragan Podlesnik.


Journal of Vacuum Science & Technology B | 2001

Characteristics and mechanism of etch process sensitivity to chamber surface condition

Songlin Xu; Zhiwen Sun; Xue-Yu Qian; John Holland; Dragan Podlesnik

Process variation with chamber surface condition in high density plasma reactors can seriously affect the process performance and productivity of device manufacturing. In this work, the impact of chamber surface coating on polycrystalline-silicon (polysilicon) gate etching with Cl2- and HBr-based plasma has been studied. The dependence of process sensitivity to surface coating on various processing conditions has been characterized and the mechanism of process shift has been analyzed. Based on the experimental results, the root cause of process sensitivity has been attributed to the change of surface recombination rate of free radicals on different chamber surfaces which leads to a variation in reactive neutral density. Under a certain discharge condition, the Cl and Br densities in a clean chamber with anodized aluminum and alumina surfaces are >60% lower than those in a seasoned chamber with silicon oxide deposition, resulting in lower polysilicon and oxide etch rate in the former case. In general, the ...


Ibm Journal of Research and Development | 1995

Low-temperature chemical vapor deposition processes and dielectrics for microelectronic circuit manufacturing at IBM

Donna Rizzone Cote; Son Van Nguyen; William J. Cote; Scott L. Pennington; Anthony K. Stamper; Dragan Podlesnik

Significant progress has been made over the past decade in low-temperature plasma-enhanced and thermal chemical vapor deposition (CVD). The progress has occurred in response to the high demands placed on the insulators of multilevel microelectronic circuits because of the continuing reduction in circuit dimensions. High-aspect-ratio gap filling is foremost among these demands, which also include lower processing temperatures and improved dielectric planarization. This paper reviews the history of interlevel and intermetal dielectrics used in microelectronic circuit manufacturing at IBM and the current status of processes used in IBM manufacturing and development lines, and describes the challenges for future memory and logic chip applications.


Journal of Vacuum Science and Technology | 2001

Fluorocarbon polymer formation, characterization, and reduction in polycrystalline–silicon etching with CF4-added plasma

Songlin Xu; Zhiwen Sun; Arthur Y. Chen; Xue-Yu Qian; Dragan Podlesnik

Addition of CF4 into HBr-based plasma for polycrystalline–silicon gate etching reduces the deposition of an etch byproduct, silicon oxide, onto the chamber wall but tends to generate organic polymer. In this work, a detailed study has been carried out to analyze the mechanism of polymerization and to characterize the polymer composition and quantity. The study has shown that the polymer formation is due to the F-radical depletion by H atoms dissociated from HBr. The composition of the polymer changes significantly with CF4 concentration in the gas feed, and the polymer deposition rate depends on CF4% and other process conditions such as source power, bias power, and pressure. Surface temperature also affects the polymer deposition rate. Adding O2 into the plasma can clean the organic polymer, but the O2 amount has to be well controlled in order to prevent the formation of silicon oxide. Based on a series of tests to evaluate polymer deposition and oxide cleaning with O2 addition, an optimized process regi...


Journal of Vacuum Science and Technology | 2001

Wall-dependent etching characteristics of organic antireflection coating in O2+halogen/hydrogen halide plasma

Songlin Xu; Thorsten Lill; Dragan Podlesnik

Process instability in plasma etching of organic bottom-antireflection coating (BARC) using the plasma of O2 mixed with halogen (Cl2) or hydrogen halide (HBr, HCl) has been studied. From a series of process tests performed on a high density plasma etcher, the process instability has been found to be chamber-wall related as the BARC etch rate and critical-dimension bias shift when chamber coating changes. The process sensitivity to the chamber wall condition depends on the type of halogen-containing additive used and the O2 percentage in the total gas feed. Through plasma diagnostics, the root cause of the process shift has been identified as the variation in the surface recombination rate of reactive free radicals with chamber wall condition. The recombination of O radicals to form O2 is faster on alumina/anodized aluminum than on silicon oxide so that the O radical density becomes lower in the bulk plasma. The enhanced competing surface recombination of O and H radicals when HBr or HCl is used further lo...


Archive | 2001

Method for dicing a semiconductor wafer

Ajay Kumar; Padmapani C. Nallan; Anisul Khan; Dragan Podlesnik


Archive | 2001

Two etchant etch method

Anisul Khan; Ajay Kumar; Jeffrey D. Chinn; Dragan Podlesnik


Archive | 1999

Method for etching a trench having rounded top and bottom corners in a silicon substrate

David Mui; Dragan Podlesnik; Wei Liu; Gene Lee; Nam-Hun Kim; Jeff Chinn


Archive | 2003

Etch chamber with dual frequency biasing sources and a single frequency plasma generating source

Jin-yuan Chen; Frank F. Hooshdaran; Dragan Podlesnik


Archive | 2002

Method and apparatus for dicing a semiconductor wafer

Ajay Kumar; Padmapani C. Nallan; Anisul Khan; Dragan Podlesnik


Archive | 1999

Self cleaning method of forming deep trenches in silicon substrates

Anisul Khan; Ajay Kumar; Jeffrey D. Chinn; Dragan Podlesnik

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