Duk-Kyun Woo

Performance characterization of prelinking and preloadingfor embedded systems

Application launching times in embedded systems are more crucial than in general-purpose systems since the response times of embedded applications are significantly affected by the launching times. As general-purpose operating systems are increasingly used in embedded systems, reducing appli-cation launching times are one of the most influential factors for performance improvement. In order to reduce the application launching times, three factors should be considered at the same time: relocation time, symbol resolution time, and binary loading time. In this paper, we propose a new application execution model using a combination of prelinking and preloading to reduce the relocation, symbol resolution, and binary load overheads at the same time. Such application execution model is realized using fork and dlopen execution model instead of traditional fork and exec execution model. We evaluate the performance effect of the proposed fork and dlopen application execution model on a Linux-based embedded system using XScale processor. By applying the proposed application execution model using both prelinking and preloading, the application launching times are reduced up to 71% and relocation counts are reduced up to 91% in the benchmark programs we used.

RealSSim: a simulator for indoor sensor network systems

Existing sensor network simulators are not appropriate for indoor sensor network systems. We present RealSSim, the sensor network simulator especially developed for indoor sensor networks. RealSSim considers the structure of buildings and the quality of construction materials for accurate radio propagation analysis. It also supports an attractive visualization of the level as commercial products. In our demonstration, we show the whole process of simulation for two indoor sensor network systems.

Experimental analysis on time-triggered power consumption measurement with DVS-enabled multiple power domain platform

Recently, the battery and low-power H/W technologies for mobile and wearable computing devices have been advanced rapidly. But on the other hand the computation and communication demands of the embedded applications are increasing more rapidly. Therefore, the application developers are still required to develop their codes to utilize the available energy as efficient as possible. The provision of software power measurement with reasonable accuracy, consistency and low overhead is an indispensable factor for software power engineering. In this paper, we present a time-triggered mechanism for providing energy consumption profiles in the level of C functions. The similar mechanisms have already been introduced at the previous researches such as PowerScope and ePRO. Instead, we, in this paper, introduce our efforts to extend these researches to incorporate power domains and DVS (Dynamic Voltage Scaling), then interpret these mechanisms as the view of time-triggered approach for better understanding to the relationships among timer interrupt, context switching, DAQ triggering, multi-channel DAQ delay, and etc. From our experimental results, we could conclude that the timetriggered approach for the function level energy measurement properly worked with low overheads and produced consistent energy consumption profiles on the DVS-applied program codes running upon the platforms supporting multiple power domains.

Esto NS-Debugger: The Non-stop Debugger for Embedded Systems

Nowadays there is a lot of embedded software derived from the widespread of embedded systems. The characteristics of the embedded systems are the small size, limited resource and power. Because of that reason, the software in the embedded system is different from general computer software. Especially, finding bugs in the embedded software is the most different and complicate activity out of the embedded system development processes. In order to provide the high flexibility and the efficient deployment of various embedded systems, we developed a scalable and user-friendly debugger named Esto NS-Debugger (Esto Non-Stop Debugger). It supports general debugger functions and user-friendly interface like general software debugger. Especially as the time-sensitive and time-consuming application debugging is very difficult and boredom jobs, we also support a non-stop debugging function. In this paper, we focus on the design and implementation of the non-stop debugging function.

Performance comparison of MRTOS and VxWorks in MultiBench benchmark suite

Recently, multiple core systems are widely used in various area. To meet the needs of mission-critical applications running on multicore systems, a realtime operating system (RTOS) and verification testing for multicore are absolutely necessary. We have developed the multicore RTOS (MRTOS) for supporting the symmetric multiprocessing. It includes multicore system BSP, multicore kernel, middleware, and IDE. To evaluate the developed RTOS, in this paper, we have compared the performance of the VxWorks and the developed RTOS by using the embedded MultiBench algorithms. We observed that the developed RTOS is able to achieve more than 90% of the performance of VxWorks on average.

Multi-Level Ultra Low-Power Mode Support Mechanisms for Wearable Device

For the convenience of users, thousands of wearable devices with new built-in applications are appearing every year in the field of healthcare, sports, and safety. However, the system of them should be operated by using limited capacity of power because of very small size of battery that can be loaded into a wearable device due to the device properties. For such a reason, Chip Vendors are recently launching MCUs with ultra-low power capability on the market and also MCU that supports 7-step low power mode was appeared at present[1-3]. But now, it is very rare case to completely use Low Power Mode offered by MCU vendor on the operating system (OS) that is applied to wearable devices, and there is no case to support low power mode by the OS at the board level. Therefore, this paper suggests optimal supporting mechanism for ultra-low power multi-step mode at the OS level of wearable device. The mechanism proposed in this paper is largely divided into two parts. First, it is Low Power Mode Governor (LPMG) which is a module used to select an optimal low power mode after computation of retention time in idle mode. Second, we proposed Power-Off Mode, which disconnects power to the board when idle mode lasts for a long time. When integrating these two technologies and applying them to the Tickless nanoQplus[4], the OS for wearable devices developed at our lab, in the same Wearable Application Scenario 2 test, power consumption after passing a certain duration of time is reduced by 98.05% compared to idle mode, and 96.33% compared to sleep mode. These newly proposed two technologies will be able to offer an effective solution required to achieve low power consumption in wearable devices.

Enhancing the simulation speed of sensor network applications by asynchronization of interrupt service routines.

Sensor network simulations require high fidelity and timing accuracy to be used as an implementation and evaluation tool. The cycle-accurate and instruction-level simulator is the known solution for these purposes. However, this type of simulation incurs a high computation cost since it has to model not only the instruction level behavior but also the synchronization between multiple sensors for their causality. This paper presents a novel technique that exploits asynchronous simulations of interrupt service routines (ISR). We can avoid the synchronization overheads when the interrupt service routines are simulated without preemption. If the causality errors occur, we devise a rollback procedure to restore the original synchronized simulation. This concept can be extended to any instruction-level sensor network simulator. Evaluation results show our method can enhance the simulation speed up to 52% in the case of our experiments. For applications with longer interrupt service routines and smaller number of preemptions, the speedup becomes greater. In addition, our simulator is 2 to 11 times faster than the well-known sensor network simulator.