Dušan Grujić

A Power Efficient Frequency Divider for 60 GHz Band

Four stage injection locked ring oscillator frequency divider by 16 is presented in this letter. Test chip was fabricated in IHP 0.25 μm SiGe:C HBT BiCMOS technology (200/200 GHz <i>fT</i> /<i>fMAX</i> ). Test chip area is 0.24 mm² with core size of only 116 × 80 μm². Total power consumption is 23.8 mW from 3 V supply for all cores. The divider operates in a frequency range of 34 to >; 67 GHz with the input power level of -10 dBm. Very good first stage FOM value of 6.7 GHz/mW is reported.

60 GHz SiGe:C HBT Power Amplifier With 17.4 dBm Output Power and 16.3% PAE

Single stage cascode power amplifier for 60 GHz band is presented in this letter. Modeling methodology, together with effects of (im)proper local interconnect modeling on achievable output power is discussed. Design partitioning is proposed to reduce the complexity of EM models, while retaining the accuracy of simulation. Test chip was fabricated in a 0.25 μm BiCMOS SiGe:C HBT technology with 200/200 GHz, and measured on-wafer. Measurement results are in close agreement with simulation, validating our modeling approach. Saturated output power of 17.4 dBm and peak PAE of 16.3% was measured at 61.5 GHz. Small signal measurements indicate that the PA covers the whole unlicensed 60 GHz band.

Design of monolithic microwave integrated circuits for 60 GHz Band

Technology scaling allows the use of commercially available processes for 60 GHz band applications, but introduces more and more physical constraints. If not taken into account in early design stages, technology constraints can severely impair the performance. Two 60 GHz power amplifiers have been designed in novel technology-aware design flow, which provides insight into small and large signal relationships. New technology Figure of Merit pCM is introduced, which can be used to compare technologies. Power amplifier test chips were fabricated and measured on-wafer. Simulation and measurement results correlation is proving that predictable silicon performance can be achieved with a proposed flow.

Numerical Hilbert Transform Algorithm for Causal Interpolation of Piecewise Polynomial Even and Odd Functions

Causal interpolation of frequency-domain experimental or simulation data known at discrete points is essential for an accurate time-domain analysis. Hilbert transform has a central role in causal interpolation, because it relates the real and imaginary parts of a causal quantity. This paper presents an algorithm for numerical Hilbert transform suitable for causal interpolation of data spanning several frequency decades. It does not suffer from aliasing and large number of points due to fixed frequency step, which are common problems in fast Fourier transform-based algorithms. The algorithm also exploits the symmetry property of frequency domain electrical quantities. Verification was performed by comparing the algorithm’s output to published results for test cases of Cauchy pulse and causal interpolation of characteristic impedance.

On the importance of electromagnetic models in RFIC design

Proper inclusion of EM analysis in the design flow of RF integrated circuits (RFIC) proves to be essential in avoiding costly re-spins, reducing both design cost and time-to-market. However, EM modeling and simulation is not straight-forward, due to the nature and complexity of the EM analysis, as well as the relative immaturity of the methodology and integration of appropriate tools in traditional IC design flow. The aim of this paper is to assist the RFIC designer in the area of EM simulation, first with presenting some modeling and simulation issues that are of importance for successful design, followed by a set of design examples presented from an EM perspective, illustrating problems, possible solution, and emphasizing the importance of EM modeling and simulation in modern RFIC design.

BSIM4 to PSP Model Conversion: A Case Study

BSIM4 model is not suitable for distortion analysis of circuits with bias point VDS=0, such as passive mixers and RF switches, due to discontinuities in higher order derivatives. Surface potential based PSP model has continuous derivatives to at least third-order, and is therefore suitable for intermodulation products simulation. This paper presents the case study of BSIM4 to PSP model conversion flow and comparison of active and passive mixers and SPDT RF switch simulation results. Simulation results show good agreement of original BSIM4 and converted PSP models’ CV, IV, compression point, conversion loss and noise figure, which validates the conversion flow. The converted model has a correct third-order intermodulation products (IM3) slope of three, allowing the simulation of intermodulation products, which was not possible with the original BSIM4 model.