E. Kaneshiro

Ultrahigh-efficiency power amplifier for space radar applications

This paper describes a broad-band switch mode power amplifier based on the indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. The amplifier combines the alternative Class-E mode of operation with a harmonic termination technique that minimizes the insertion loss of matching circuitry to obtain ultrahigh-efficiency operation at X-band. For broad-band Class-E performance, the amplifiers output network employs a transmission line topology to achieve broad-band harmonic terminations while providing the optimal fundamental impedance to shape the output current and voltage waveforms of the device for maximum efficiency performance. As a result, 65% power-added efficiency (PAE) was achieved at 10 GHz. Over the frequency band of 9-11 GHz, the power amplifier achieved 49%-65% PAE, 18-22 dBm of output power, and 8-11 dB gain at 4 V supply. The reported power amplifier achieved what is believed to be the best PAE performance at 10 GHz and the widest bandwidth for a switch-mode design at X-band.

High performance, high yield InP DHBT production process for 40 Gbps applications

High-speed digital logic is essential in diverse applications such as optical communication, frequency synthesizers, and analog-digital conversion. Current research efforts indicate that technologies utilizing heterojunction bipolar transistors (HBTs) are the preferred approach for systems operating at clock frequencies of 40 GHz and above. This need for higher performance electronics for space and defense applications has driven the development of InP HBTs at TRW. Consistent and continuous improvements from the baseline MBE structure and process technology have enhanced frequency performance, breakdown voltage, producibility, yield, reliability such that InP HBTs are being used successfully for many commercial, space, and defense applications. This paper describes our optimized high-yield production InP DHBT process which simultaneously combines f/sub T/>170 GHz, f/sub max/>190 GHz, and breakdown voltage /spl sim/7 V.

Advanced Heterogeneous Integration of InP HBT and CMOS Si Technologies

Northrop Grumman Aerospace Systems (NGAS) is developing an Advanced Heterogeneous Integration (AHI) process to integrate III-V semiconductor chiplets on CMOS wafers under the Compound Semiconductor Materials on Silicon (COSMOS) DARPA program. The objective of the program is to have a heterogeneous interconnect pitch and length less than 5 um to enable intimate transistor scale integration. This integration will enable significant improvement in dynamic range and bandwidth of high performance mixed signal circuits.

Diverse Accessible Heterogeneous Integration (DAHI) at Northrop Grumman Aerospace Systems (NGAS)

Northrop Grumman Aerospace Systems (NGAS) under the Diverse Accessible Heterojunction Integration (DAHI) DARPA program is developing heterogeneous integration processes, process design kit (PDK) and thermal analysis tools to integrate deep submicron CMOS, Indium Phosphide (InP) heterojunction bipolar transistors (HBTs), Gallium Nitride (GaN) high electron mobility transistors (HEMTs) and high-Q passive technologies for advanced DoD and other government systems.

A 0.25

Static frequency dividers are widely used technology performance benchmark circuits. Using a 0.25 μm 530 GHz fT /600 GHz+ fmax InP DHBT process, a static frequency divider circuit has been designed, fabricated, and measured to operate up to 200.6 GHz. The divide-by-two core flip-flop dissipates 228 mW. Techniques used for the divider design optimization and for selecting variants to maximize performance across process changes are also discussed.

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We present a method of measurement and characterization of the differential thermal resistance and non-linear temperature rise for small GaAs and InP heterojunction bipolar transistors. It is shown that nonlinear thermal behavior of the transistor can be completely described by the zero power thermal resistance and linear temperature coefficient, and that for small devices the zero power thermal resistance approximately scales with emitter area and that this scaling is more favorable for InP HBTs when compared to GaAs HBTs.

m InP DHBT 200 GHz+ Static Frequency Divider

We report on the first InP DHBT K-band fully integrated power amplifier which achieves 0.5 Watts of output power and 40% power added efficiency (PAE). The power DHBTs obtain a BVceo >18 V and an f/sub T/ and f/sub max/ of 80 GHz and 160 GHz, respectively. The MMIC amplifier combines eight 1.5/spl times/30 /spl mu/m/sup 2/ emitter fingers for a total periphery of 360 /spl mu/m/sup 2/. At 21 GHz the MMIC power amplifier achieves a linear gain of 9.4 dB, output power of 27 dBm with a 40% PAE. The amplifier was operated under a Vce=5.5V and Jc=54 KA/cm/sup 2/ and obtained a corresponding power density of 1.4 mW//spl mu/m/sup 2/. To our knowledge this is the highest output power obtained for a fully monolithic-50-/spl Omega/-matched MMIC power amplifier based on InP HBT technology.

Characterization and measurement of non-linear temperature rise and thermal resistance in InP heterojunction bipolar transistors

Abstract - Gigahertz-rate Digital-to-Analog Converters (DACs) have become readily available from several commercial vendors but have been unable to achieve >70 dB spurious-free dynamic range (SFDR) performance over a wide bandwidth (≥500MHz). This paper presents the results of a unique, heterogeneously-integrated (InP HBT with 0.18um silicon CMOS), 13-bit 1.33Gsps DAC that achieves >70dB SFDR across a 500MHz bandwidth in the second Nyquist zone (750MHz to 1250MHz).

A 0.5 watt-40% PAE InP double heterojunction bipolar transistor K-band MMIC power amplifier

A broadband, high efficiency, X-band power amplifier is presented in this paper. The single-stage amplifier is based on indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. In order to obtain high efficiency operation, a switch mode, class-E amplifier topology was selected. Special attention has been paid to providing the required fundamental matching conditions, as well as appropriate harmonic terminations, over the frequency band of interest. As a result, the amplifier obtained a bandwidth of 40%, with 45-60% PAE, 19-21.5dBm Pout, and 9-11.5dB large-signal gain at X-band. To the best of our knowledge, this circuit demonstrates the widest bandwidth for a class-E amplifier at X-band.

InP HBT/Si CMOS-Based 13-Bit 1.33Gsps Digital-to-Analog Converter with >70 dB SFDR

We report on an ultra-efficient circuit at X-band and a linear-efficient circuit at Ka-band using InP double heterojunction bipolar transistors (DHBTs). The high efficiency circuit employs a transmission line Class-E topology to achieve 61.1% PAE, 20.1-dBm output power, and 9.8-dB gain at 10 GHz. The linear efficient circuit combines four unit cells of 1.5 /spl mu/m /spl times/ 30 /spl mu/m /spl times/ 2 fingers that yielded 25.2 dBm output power, 8.4-dB linear gain, and 35.2% PAE at 28 GHz. This circuit also achieved 31 to 34 dBm output IP3.