E. Kapetanakis

Charge storage and interface states effects in Si-nanocrystal memory obtained using low-energy Si^ implantation and annealing

Thin SiO2 oxides implanted by very-low-energy (1 keV) Si ions and subsequently annealed are explored with regards to their potential as active elements of memory devices. Charge storage effects as a function of Si fluence are investigated through capacitance and channel current measurements. Capacitance–voltage and source–drain current versus gate voltage characteristics of devices implanted with a dose of 1×1016 cm−2 or lower exhibit clear hysteresis characteristics at low electric field. The observed fluence dependence of the device electrical properties is interpreted in terms of the implanted oxide structure.

Effect of annealing environment on the memory properties of thin oxides with embedded Si nanocrystals obtained by low-energy ion-beam synthesis

The effect of annealing in diluted oxygen versus inert environment on the structural and electrical characteristics of thin silicon dioxide layers with embedded Si nanocrystals fabricated by very low-energy silicon implantation (1 keV) is reported. Annealing in diluted oxygen increases the thickness of the control oxide, improves the integrity of the oxide and narrows the size distribution of the nanocrystals without affecting significantly their mean size (∼2 nm). Strong charge storage effects at low gate voltages and enhanced charge retention times are observed through electrical measurements of metal-oxide-semiconductor capacitors. These results indicate that a combination of low-energy silicon implants and annealing in diluted oxygen allows for the fabrication of improved low-voltage nonvolatile memory devices.

Room-temperature single-electron charging phenomena in large-area nanocrystal memory obtained by low-energy ion beam synthesis

We investigated the dependence of implantation dose on the charge storage characteristics of large-area n-channel metal–oxide–semiconductor field-effect transistors with 1-keV Si+-implanted gate oxides. Gate bias and time-dependent source–drain current measurements are reported. Devices implanted with 1×1016 cm−2 Si dose exhibit a continuous (trap-like) charge storage process under both static and dynamic conditions. In contrast, for 2×1016 cm−2 implanted devices, electrons are stored in Si nanocrystals in discrete units at low gate voltages, as revealed by a periodic staircase plateau of the source–drain current with a low gate voltage sweep rate, and the step-like decrease of the time-dependent monitoring of the channel current. These observations of room-temperature single-electron storage effects support the pursuit of large-area devices operating on the basis of Coulomb blockade phenomena.

Formation of 2-D arrays of semiconductor nanocrystals or semiconductor-rich nanolayers by very low-energy Si or Ge ion implantation in silicon oxide films

Abstract The structure evolution of annealed low-energy Si- or Ge-implanted thin and thick SiO2 layers is studied. The majority of Si (or Ge) species is restricted within a 3–4 nm thick layer. Si is able to separate and crystallize more easily than Ge. The glass transition temperature of the as-implanted structure has a significant effect on the progress of phase transformations accompanying annealing.

MOS memory devices based on silicon nanocrystal arrays fabricated by very low energy ion implantation

Abstract The electrical characteristics of Si nanocrystal-based MOS memory devices are studied. The nanocrystals are fabricated into 8-nm thin oxide by very low energy Si + implantation at different doses and subsequent annealing. TEM work suggests that Si nanocrystals develop at a density, size and perfection that vary strongly with the implanted dose and these structural features are found compatible with the device transfer characteristics.

Silicon nanocrystal formation in thin thermal-oxide films by very-low energy Si+ ion implantation

Abstract Thin thermally grown silicon oxides are implanted with a high dose of silicon using very low energy ion implantation. After high temperature annealing, the oxides are observed by Transmission Electron Microscopy which reveals the existence of silicon nano-crystals. The electrical properties of metal-oxide-semiconductor devices are then investigated using dynamic conductance as well as dc current measurements.

Effects of annealing conditions on charge storage of Si nanocrystal memory devices obtained by low-energy ion beam synthesis

The structural and electrical characteristics of thin silicon dioxide layers with embedded Si nanocrystals are reported fabricated by low-energy silicon implantation and with subsequent annealing in inert and diluted oxygen. Thermal treatment in diluted oxygen increases the thickness of the control oxide, does not affect significantly the size of the nanocrystals, and improves the integrity of the oxide. As a result, strong charge storage effects at low gate voltages and enhanced charge retention times are observed through electrical measurements of MOS capacitors. These results indicate that a combination of low-energy silicon implants and annealing in diluted oxygen permits the fabrication of low-voltage nonvolatile memory devices.

Controlled fabrication of Si nanocrystal delta-layers in thin SiO2 layers by plasma immersion ion implantation for nonvolatile memories

Plasma Immersion Ion Implantation (PIII) is a promising alternative to beam line implantation to produce a single layer of nanocrystals (NCs) in the gate insulator of metal-oxide semiconductor devices. We report herein the fabrication of two-dimensional Si-NCs arrays in thin SiO2 films using PIII and rapid thermal annealing. The effect of plasma and implantation conditions on the structural properties of the NC layers is examined by transmission electron microscopy. A fine tuning of the NCs characteristics is possible by optimizing the oxide thickness, implantation energy, and dose. Electrical characterization revealed that the PIII-produced-Si NC structures are appealing for nonvolatile memories.

Oxidation of nitrogen-implanted silicon: Comparison of nitrogen distribution and electrical properties of oxides formed by very low and medium energy N2+ implantation

In a previous work [Skarlatos et al., J. Appl. Phys. 93, 1832 (2003)] we investigated the influence of implantation energy on oxide growth and defect formation in nitrogen-implanted silicon substrates. It was shown that as the implantation energy decreases from medium to very low values the oxide reduction decreases. This was attributed to nitrogen out-diffusion, which is more effective when nitrogen is placed closer to the silicon surface. On the other hand very low implantation energy avoids the formation of dislocation loops in the silicon substrate, a key point for modern devices performance. In this second part we compare the nitrogen distribution and electrical properties of ultrathin (25–30 A) oxides grown under the same oxidation conditions on very low (3 keV) and medium (25 keV) energy nitrogen-implantated silicon. Nitrogen distribution measurements show that a lower content of nitrogen remains within the oxides formed using 3 keV energy as compared to the 25 keV case supporting the results of th...

Evolution and control of the structure of a SiO2/semiconductor nanoelectronics material

The study of a silica nanolayer implanted by semiconductor (germanium or silicon) species offers unique insights regarding the structural evolution and, ultimately, the controlled fabrication of nanoelectronics multiphase materials through one or more phase transformation steps. A description integrating important restructuring phenomena identified so far is provided and special emphasis is placed upon the interpretation and consequences of new transmission electron microscopy observations of in situ phase separation of Ge-implanted nanolayers.