Edison H. Chiu

Integrated FET circuit to reduce switching noise

Color palette device having big/little endian interfacing, systems and methods

Method for assigning priority to read and write requests received closely in time

Easily cascadable and testable cache memory

Monolithic programmable format pixel array

Spatial light modulator having single bit-line dual-latch memory cells

Memory cell array for digital spatial light modulator

Circuitry for transferring data from a data bus and temporary register into a plurality of input registers on clock edges

Architecture for memory multiplexing

Floating point processor architecture