Jeffrey A. Niehaus

Multiple-input binary adder

Digital crossbar switch

Register stack for a bit slice processor microsequencer

Test circuit for VSLI integrated circuits

Circuitry for transferring data from a data bus and temporary register into a plurality of input registers on clock edges

Floating point processor architecture

Status output for a bit slice ALU

Test circuit for screening parts

Register file for bit slice processor with simultaneous accessing of plural memory array cells

Circuit for providing fast logic transitions