Eduardo Weber Wachter

Dataset for "Workload-Aware Runtime Energy Management for HPC Systems"

This dataset supports the article entitled Workload-Aware Runtime Energy Management for HPC Systems accepted for publication in International Workshop on Optimization of Energy Efficient HPC & Distributed Systems (OPTIM), July 16–20, 2018, Orleans, France.

Dataset supporting the article entitled "Memory and Thread Synchronization Contention-Aware DVFS for HPC systems"

This dataset supports the article entitled Memory and Thread Synchronization Contention-Aware DVFS for HPC systems accepted in Adaptive Many-Core Architectures and Systems workshop, 13-15 June, 2018, York, UK.

Dataset for Application Control and Monitoring in Heterogeneous Multiprocessor Systems

Dataset supports:nLeech, C. et al (2018) Application Control and Monitoring in Heterogeneous Multiprocessor Systems. 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)

Dataset for An Application- and Platform-agnostic Control and Monitoring Framework for Multicore Systems

Dataset supports:nBragg, G. M. et al (2018) An Application- and Platform-agnostic Control and Monitoring Framework for Multicore Systems. 3rd International Conference on Pervasive and Embedded Computing (PEC).

Reliable mapping and partitioning of performance-constrained openCL applications on CPU-GPU MPSoCs

Heterogeneous Multi-Processor Systems-on-Chips (MPSoCs) containing CPU and GPU cores are typically required to execute applications concurrently. Existing approaches exploit applications executing in CPU and GPU cores at the same time taking into account performance and energy consumption for mapping and partitioning. This paper presents a proposal for mapping and partitioning of applications in CPU-GPU MPSoCs taking into account the temperature behavior of the system. We evaluate the temperature profiling to partition the applications between CPU and GPU. The profiling is done by measuring the temperature of the CPU and GPU cores while executing different applications at different partitions. Results shown up to 13% savings of average temperature of the chip while maintaining performance requirements. A lower thermal behavior represents a better long-term reliability (lifetime) of the SoC.