Edward L. Griffin

N-Way MMIC Redundant Switch

A novel approach to provide redundancy in an N-Way MESFET Switch has been invented and realized with monolithic microwave integrated circuit technology. This switch circuit uses series and shunt FETs configured in a manner to prevent failure of the switch even if several FETs fail. For example a SPDT redundant switch is capable of providing 1.3 dB insertion loss, and return loss and isolation better than 20 dB and 35 dB, respectively over dc to 12 GHz, even if 25% of the FETs fail in each arm.

Accurate design of multiport low-noise MMICs up to 20 GHz

This paper presents a novel noise parameter extraction technique for MESFETs. All measurements are done with a 50 ohm source and load which allow the FET to be characterized on wafer easily, accurately and quickly. The noise parameter values are extracted using an in-house model extraction CAD tool. This technique has been validated by comparison to noise parameters measured by using tuners. Additionally, LNAs, distributed and feedback amplifier MMICs have been tested and demonstrated excellent correlations between the measured and simulated noise performance up to 20 GHz.

A High-Efficiency Power FET Fabricated using Co-Implantation and a Self-Aligned Gate

We discuss the design, fabrication and measured RF performance of fully planar, refractory, self-aligned gate (SAG) power FETs. The FET active channels are formed by direct ion-implantation into substrate. The performance and uniformity of these FETs are significantly improved by the use of a co-implant of n- and p-type dopants. The channel thickness and sheet charge are empirically adjusted for peak RF performance. The effects of channel characteristics on RF performance are demonstrated using a C-Band power MMIC as a test vehicle.