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Dive into the research topics where Ehsan Afshari is active.

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Featured researches published by Ehsan Afshari.


IEEE Journal of Solid-state Circuits | 2011

High Power Terahertz and Millimeter-Wave Oscillator Design: A Systematic Approach

Omeed Momeni; Ehsan Afshari

A systematic approach to designing high frequency and high power oscillators using activity condition is introduced. This method finds the best topology to achieve frequencies close to the fmax of the transistors. It also determines the maximum frequency of oscillation for a fixed circuit topology, considering the quality factor of the passive components. Using this technique, in a 0.13 μm CMOS process, we design and implement 121 GHz and 104 GHz fundamental oscillators with the output power of -3.5 dBm and -2.7 dBm, respectively. Next, we introduce a novel triple-push structure to realize 256 GHz and 482 GHz oscillators. The 256 GHz oscillator was implemented in a 0.13 μm CMOS process and the output power of -17 dBm was measured. The 482 GHz oscillator generates -7.9 dBm (0.16 mW) in a 65 nm CMOS process.


IEEE Journal of Solid-state Circuits | 2005

Nonlinear transmission lines for pulse shaping in silicon

Ehsan Afshari; Ali Hajimiri

Nonlinear transmission lines (NLTL) are used for pulse shaping. We developed the theory of pulse propagation through the NLTL. The problem of a wide pulse degenerating into multiple pulses rather than a single pulse is solved by using a gradually scaled NLTL. We exploit certain favorable properties of accumulation-mode MOS varactors to design an NLTL that can simultaneously sharpen both rising and falling edges. There is a good agreement among the theory, simulations, and measurements.


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2009

Delay-Line-Based Analog-to-Digital Converters

Guansheng Li; Yahya M. Tousi; Arjang Hassibi; Ehsan Afshari

We will introduce a design of analog-to-digital converters (ADCs) based on digital delay lines. Instead of voltage comparators, they convert the input voltage into a digital code by delay lines and are mainly built on digital blocks. This makes it compatible with process scaling. Two structures are proposed, and tradeoffs in the design are discussed. The effects of jitter and mismatch are also studied. We will present two 4 bit, 1 GS/s prototypes in 0.13 mum and 65 nm CMOS processes, which show a small area (0.015 mm2) and small power consumption (<2.4 mW).


IEEE Journal of Solid-state Circuits | 2012

A Low-Phase-Noise Wide-Tuning-Range Oscillator Based on Resonant Mode Switching

Guansheng Li; Li Liu; Yiwu Tang; Ehsan Afshari

In this paper we will present a low-phase-noise wide-tuning-range oscillator suitable for scaled CMOS processes. It switches between the two resonant modes of a high-order LC resonator that consists of two identical LC tanks coupled by capacitor and transformer. The mode switching method does not add lossy switches to the resonator and thus doubles frequency tuning range without degrading phase noise performance. Moreover, the coupled resonator leads to 3 dB lower phase noise than a single LC tank, which provides a way of achieving low phase noise in scaled CMOS process. Finally, the novel way of using inductive and capacitive coupling jointly decouples frequency separation and tank impedances of the two resonant modes, and makes it possible to achieve balanced performance. The proposed structure is verified by a prototype in a low power 65 nm CMOS process, which covers all cellular bands with a continuous tuning range of 2.5-5.6 GHz and meets all stringent phase noise specifications of cellular standards. It uses a 0.6 V power supply and achieves excellent phase noise figure-of-merit (FoM) of 192.5 dB at 3.7 GHz and >; 188 dB across the entire tuning range. This demonstrates the possibility of achieving low phase noise and wide tuning range at the same time in scaled CMOS processes.


IEEE Journal of Solid-state Circuits | 2013

Active Terahertz Imaging Using Schottky Diodes in CMOS: Array and 860-GHz Pixel

Ruonan Han; Yaming Zhang; Youngwan Kim; Dae Yeon Kim; Hisashi Shichijo; Ehsan Afshari; K. O. Kenneth

Schottky-barrier diodes (SBDs) fabricated in CMOS without process modification are shown to be suitable for active THz imaging applications. Using a compact passive-pixel array architecture, a fully-integrated 280-GHz 4 × 4 imager is demonstrated. At 1-MHz input modulation frequency, the measured peak responsivity is 5.1 kV/W with ±20% variation among the pixels. The measured minimum NEP is 29 pW/Hz1/2. Additionally, an 860-GHz SBD detector is implemented by reducing the number of unit cells in the diode, and by exploiting the efficiency improvement of patch antenna with frequency. The measured NEP is 42 pW/Hz1/2 at 1-MHz modulation frequency. This is competitive to the best reported performance of MOSFET-based pixel measured without attaching an external silicon lens (66 pW/Hz1/2 at 1 THz and 40 pW/Hz1/2 at 650 GHz). Given that incorporating the 280-GHz detector into an array increased the NEP by ~ 20%, the 860-GHz imager array should also have the similar NEP as that for an individual detector. The circuits were utilized in a setup that requires neither mirrors nor lenses to form THz images. These suggest that an affordable and portable fully-integrated CMOS THz imager is possible.


IEEE Journal of Solid-state Circuits | 2013

A CMOS High-Power Broadband 260-GHz Radiator Array for Spectroscopy

Ruonan Han; Ehsan Afshari

A high-power broadband 260-GHz radiation source using 65-nm bulk CMOS technology is reported. The source is an array of eight harmonic oscillators with mutual coupling through four 130-GHz quadrature oscillators. Based on a novel self-feeding structure, the harmonic oscillator simultaneously achieves the optimum conditions for the fundamental oscillation and the 2nd-harmonic generation. The signals at 260 GHz radiate through eight on-chip slot antennas, and are in-phase combined inside a hemispheric silicon lens attached at the backside of the chip. Similar to the laser pulse-driven photoconductive emitter in many THz spectrometers, the radiation of this source can also be modulated by narrow pulses generated on chip, which achieves broad radiation bandwidth. Without modulation, the chip achieves a measured continuous-wave radiated power of 1.1 mW, and an EIRP of 15.7 dBm. Under modulation, the measured bandwidth of the source is 24.7 GHz. This radiator array consumes 0.8-W DC power from a 1.2-V supply.


IEEE Journal of Solid-state Circuits | 2012

A Novel CMOS High-Power Terahertz VCO Based on Coupled Oscillators: Theory and Implementation

Yahya M. Tousi; Omeed Momeni; Ehsan Afshari

We introduce a novel frequency tuning method for high-power terahertz sources in CMOS. In this technique, multiple core oscillators are coupled to generate, combine, and deliver their harmonic power to the output node without using varactors. By exploiting the theory of nonlinear dynamics, we control the coupling between the cores to set their phase shift and frequency. Using this method, two high-power terahertz VCOs are fabricated in a 65 nm LP bulk CMOS process. The first one has a measured output power of 0.76 mW at 290 GHz with 4.5% tuning range and the output power of the second VCO is 0.46 mW at 320 GHz with 2.6% tuning range. The output power of these signal sources is 4 orders of magnitude higher than previous CMOS VCOs and is even higher than VCOs implemented in compound semiconductors with much higher cut-off frequencies.


international solid-state circuits conference | 2006

Electrical funnel: A broadband signal combining method

Ehsan Afshari; Harish S. Bhat; Xiaofeng Li; A. Hajimini

A non-uniform 2D propagation medium is compatible with modern IC processes and is used to produce a 4-to-1 broadband power combiner called an electrical funnel. The combiner is used in a wideband power amplifier in a 0.13mum SiGe BiCMOS process and yields 125mW peak output power at 85GHz with a 24GHz 3dB bandwidth


IEEE Journal of Solid-state Circuits | 2011

A Broadband mm-Wave and Terahertz Traveling-Wave Frequency Multiplier on CMOS

Omeed Momeni; Ehsan Afshari

A wideband frequency multiplier that effectively generates and combines the even harmonics from multiple transistors is proposed. It takes advantage of standing-wave formation and loss cancellation in a distributed structure to generate high amplitude signals resulting in high harmonic power. Wide bandwidth operation and odd harmonic cancellation around the center frequency are the inherent properties of this frequency multiplier. Using this methodology, we implemented a frequency doubler that operates from 220 GHz to 275 GHz in a standard 65 nm CMOS process. Output power of 6.6 dBm (0.22 mW) and conversion loss of 11.4 dB are measured at 244 GHz.


international solid-state circuits conference | 2012

A 283-to-296GHz VCO with 0.76mW peak output power in 65nm CMOS

Yahya M. Tousi; Omeed Momeni; Ehsan Afshari

Sub-mm-Wave and terahertz frequencies have many applications such as medical imaging, spectroscopy and communication systems. CMOS signal generation at this frequency range is a major challenge due to the limited cut-off frequency of transistors and their low breakdown voltage. A recent work has demonstrated generation of high power at a fixed frequency in the sub-mm-Wave range using a harmonic oscillator [1]. However, for most applications a tunable signal source is necessary. In previous works, frequency multipliers are used as an alternative for tunable power generation above 150GHz [2]. In this work, for the first time we introduce a tunable high-power oscillator at sub-mm-Wave frequencies in low-power (LP) bulk CMOS.

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Ruonan Han

Massachusetts Institute of Technology

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Omeed Momeni

University of California

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Wooram Lee

Seoul National University

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Harish S. Bhat

University of California

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