Ehsan Saeedi

Side channel information analysis based on machine learning

Cryptographic devices, even after recent improvements, are still vulnerable to side channel attacks(SCA). The majority of the available literature of SCA belongs to the traditional methods such as simple and differential analysis methods and template attacks, whilst few studies based on machine learning are available. In this paper, we investigate the side channel analysis based on machine learning techniques in the form of principal component analysis (PCA) and support vector machine (SVM). For this purpose, we verify the efficiency of RBF and POLY kernel functions of SVM classifier under the influence of the number of principal components (PCs). Our experimental results, obtained by cross validation method, comprise the accuracy and computational complexity of this method and can show the validity and the effectiveness of the proposed approach.

High-performance elliptic curve cryptography processor over NIST prime fields

This study presents a description of an efficient hardware implementation of an elliptic curve cryptography processor (ECP) for modern security applications. A high-performance elliptic curve scalar multiplication (ECSM), which is the key operation of an ECP, is developed both in affine and Jacobian coordinates over a prime field of size p using the National Institute of Standards and Technology standard. A novel combined point doubling and point addition architecture is proposed using efficient modular arithmetic to achieve high speed and low hardware utilisation of the ECP in Jacobian coordinates. This new architecture has been synthesised both in application-specific integrated circuit (ASIC) and field-programmable gate array (FPGA). A 65 nm CMOS ASIC implementation of the proposed ECP in Jacobian coordinates takes between 0.56 and 0.73 ms for 224-bit and 256-bit elliptic curve cryptography, respectively. The ECSM is also implemented in an FPGA and provides a better delay performance than previous designs. The implemented design is area-efficient and this means that it requires not many resources, without any digital signal processing (DSP) slices, on an FPGA. Moreover, the area–delay product of this design is very low compared with similar designs. To the best of the authors’ knowledge, the ECP proposed in this study over F p performs better than available hardware in terms of area and timing.

Fuzzy analysis of side channel information

Cryptographic algorithms implemented inside embedded systems have been designed to guarantee the security of data transition, but these electronic devices can be vulnerable to different class of attacks, mostly side channel attacks. Over the last decade, many attacks have been done successfully on different cryptographic algorithms, but these attacks mostly benefit from different ideal assumption and laboratory conditions. In this paper we propose a novel approach of side channel information analysis, based on fuzzy logic, that can efficiently conjecture the secret bits of a cryptosystem especially in realtime condition in which inputs are usually imprecise, noisy or missing. The validation and effictiveness of the proposed fuzzy approach is shown through a case study and accuracy comparison between electromagnetic, power and fuzzy analysis methods. Our experimental results confirmed that the fuzzy analysis produce comparable results, respectively better in the presence of noise.

Multi-class SVMs analysis of side-channel information of elliptic curve cryptosystem

Cryptosystems, even after recent algorithmic improvements, can be vulnerable to side-channel attacks (SCA). In this paper, we investigate one of the powerful class of SCAs based on machine learning techniques in the forms of Principal Component Analysis (PCA) and multi-class classification. For this purpose, a support vector machine (SVM) is investigated as a robust and efficient multi-class classifier along with a proper kernel function and its appropriate parameters. Our experiment performed on data leakage of a FPGA implementation of elliptic curve cryptography (ECC), and the results, validated by cross-validation approach, compare the efficiency of different kernel functions and the influence of function parameters.

Side channel analysis of an elliptic curve crypto-system based on multi-class classification

Cryptosystems, even after recent algorithmic improvements, can be vulnerable to side channel attacks (SCA). In this paper, we investigated one of the powerful class of SCA based on machine learning techniques in the forms of Principal Component Analysis (PCA) and multi-class classification. For this purpose, support vector machine (SVM) is investigated as a robust and efficient multi-class classifier along with a proper kernel function and its appropriate parameters. Our experiment performed on data leakage of FPGA implementation of elliptic curve cryptography (ECC), and the results, validated by cross validation approach, compare the efficiency of different kernel functions and the influence of function parameters.

Feed-Forward Back-Propagation Neural Networks in Side-Channel Information Characterisation

The safety of cryptosystems, mainly based on algorithmic improvement, is still vulnerable to side-channel attacks (SCA) based on machine learning. Multi-class classification based on neural network...

The investigation of neural networks performance in side-channel attacks

Scientists have devoted a lot of affords to guarantee the safety of cryptosystems by improving cryptography algorithms, while these systems can still be vulnerable to side-channel information analysis based on neural networks (NNs) and principal component analysis (PCA). PCA can be used as a preprocessing stage, while NNs can learn the signature (power consumption and electromagnetic emission) of an instruction of a cryptography algorithm, and then recognizes it later automatically. This paper investigate the performance of NNs as a powerful classifier to analysis the side-channel information. For this purpose, an experimental investigation was conducted based on the power consumption and electromagnetic emission analysis of a field-programmable gate array implementation of elliptic curve cryptography. In our experimental results, the performance of different NNs topologies are compared which provide useful information for cryptosystem designers. In addition an efficient NN topology is introduced for characterization of side-channel information.

Parallel point-multiplication architecture using combined group operations for high-speed cryptographic applications

In this paper, we propose a novel parallel architecture for fast hardware implementation of elliptic curve point multiplication (ECPM), which is the key operation of an elliptic curve cryptography processor. The point multiplication over binary fields is synthesized on both FPGA and ASIC technology by designing fast elliptic curve group operations in Jacobian projective coordinates. A novel combined point doubling and point addition (PDPA) architecture is proposed for group operations to achieve high speed and low hardware requirements for ECPM. It has been implemented over the binary field which is recommended by the National Institute of Standards and Technology (NIST). The proposed ECPM supports two Koblitz and random curves for the key sizes 233 and 163 bits. For group operations, a finite-field arithmetic operation, e.g. multiplication, is designed on a polynomial basis. The delay of a 233-bit point multiplication is only 3.05 and 3.56 μs, in a Xilinx Virtex-7 FPGA, for Koblitz and random curves, respectively, and 0.81 μs in an ASIC 65-nm technology, which are the fastest hardware implementation results reported in the literature to date. In addition, a 163-bit point multiplication is also implemented in FPGA and ASIC for fair comparison which takes around 0.33 and 0.46 μs, respectively. The area-time product of the proposed point multiplication is very low compared to similar designs. The performance (1Area×Time=1AT) and Area × Time × Energy (ATE) product of the proposed design are far better than the most significant studies found in the literature.

Side-channel attacks and learning-vector quantization

The security of cryptographic systems is a major concern for cryptosystem designers, even though cryptography algorithms have been improved. Side-channel attacks, by taking advantage of physical vulnerabilities of cryptosystems, aim to gain secret information. Several approaches have been proposed to analyze side-channel information, among which machine learning is known as a promising method. Machine learning in terms of neural networks learns the signature (power consumption and electromagnetic emission) of an instruction, and then recognizes it automatically. In this paper, a novel experimental investigation was conducted on field-programmable gate array (FPGA) implementation of elliptic curve cryptography (ECC), to explore the efficiency of side-channel information characterization based on a learning vector quantization (LVQ) neural network. The main characteristics of LVQ as a multi-class classifier are that it has the ability to learn complex non-linear input-output relationships, use sequential training procedures, and adapt to the data. Experimental results show the performance of multi-class classification based on LVQ as a powerful and promising approach of side-channel data characterization.

High-Performance FPGA Implementation of Elliptic Curve Cryptography Processor over Binary Field GF(2^163)

Elliptic curve cryptography (ECC) plays a vital role in passing secure information among different wireless devices. This paper presents a fast, high-performance hardware implementation of an ECC processor over binary field GF(2m) using a polynomial basis. A high-performance elliptic curve point multiplier (ECPM) is designed using an efficient finite-field arithmetic unit in affine coordinates, where ECPM is the key operation of an ECC processor. It has been implemented using the National Institute of Standards and Technology (NIST) recommended curves over the field GF(2163). The proposed design is synthesized in field-programmable gate array (FPGA) technology with the VHDL. The delay of ECPM in a modern Xilinx Kintex-7 (28-nm) technology is 1.06 ms at 306.48 MHz. The proposed ECC processor takes a small amount of resources on the FPGA and needs only 2253 slices without using any DSP slices. The proposed design provides nearly 50% better delay performance than recent implementations.