Yinan Kong

Efficient hardware implementation strategy for local normalization of fingerprint images

Global techniques do not produce satisfying and definitive results for fingerprint image normalization due to the non-stationary nature of the image contents. Local normalization techniques are employed, which are a better alternative to deal with local image statistics. Conventional local normalization techniques involve pixelwise division by the local variance and thus have the potential to amplify unwanted noise structures, especially in low-activity background regions. To counter the background noise amplification, the research work presented here introduces a correction factor that, once multiplied with the output of the conventional normalization algorithm, will enhance only the feature region of the image while avoiding the background area entirely. In essence, its task is to provide the job of foreground segmentation. A modified local normalization has been proposed along with its efficient hardware structure. On the way to achieve real-time hardware implementation, certain important computationally efficient approximations are deployed. Test results show an improved speed for the hardware architecture while sustaining reasonable enhancement benchmarks.

Efficient Hardware Implementation For Fingerprint Image Enhancement Using Anisotropic Gaussian Filter

A real-time image filtering technique is proposed which could result in faster implementation for fingerprint image enhancement. One major hurdle associated with fingerprint filtering techniques is the expensive nature of their hardware implementations. To circumvent this, a modified anisotropic Gaussian filter is efficiently adopted in hardware by decomposing the filter into two orthogonal Gaussians and an oriented line Gaussian. An architecture is developed for dynamically controlling the orientation of the line Gaussian filter. To further improve the performance of the filter, the input image is homogenized by a local image normalization. In the proposed structure, for a middle-range reconfigurable FPGA, both parallel compute-intensive and real-time demands were achieved. We manage to efficiently speed up the image-processing time and improve the resource utilization of the FPGA. Test results show an improved speed for its hardware architecture while maintaining reasonable enhancement benchmarks.

Low-Area wallace multiplier

Multiplication is one of the most commonly used operations in the arithmetic. Multipliers based on Wallace reduction tree provide an area-efficient strategy for high speed multiplication. A number of modifications are proposed in the literature to optimize the area of the Wallace multiplier. This paper proposed a reduced-area Wallace multiplier without compromising on the speed of the original Wallace multiplier. Designs are synthesized using Synopsys Design Compiler in 90 nm process technology. Synthesis results show that the proposed multiplier has the lowest area as compared to other tree-based multipliers. The speed of the proposed and reference multipliers is almost the same.

A spatial domain scar removal strategy for fingerprint image enhancement

Fingerprints are the oldest and most widely used form of biometric identification. Many researchers have addressed the fingerprint classification problem and significant progress has been made in designing automatic fingerprint identification systems (AFIS) over the past two decades. However, some design factors such as lack of reliable minutia extraction algorithms, difficulty in quantitatively defining a reliable match between fingerprint images, poor image acquisition, low contrast images create bottlenecks in achieving the desired performance. Noticeable among them is the fact that digitally acquired fingerprint images are rarely of perfect quality to be used directly with AFIS; one important step is fingerprint enhancement. Conventional fingerprint enhancement methods, such as Gabor and anisotropic filters, do fill the holes and gaps in ridge lines but lack the necessary capability to tackle scar lines. For scar lines, an explicit filling process is proposed that is a mix of Fourier and spatial domain strategies. The proposed method is to make use of the Fourier domain directional field to trace an appropriate candidate for the scar pixels to be replaced with. The necessary components of the process are locating scars, estimating directional field, and the filling strategy. This process can act as front-end to the subsequent Gabor and anisotropic diffusion filtering. The simulation results for synthetic, as well as real fingerprints, show improved performance regarding better extraction of genuine minutia points. HighlightsWe Model a new proposed method to make use of the Fourier domain directional field to trace an appropriate candidate for the scar pixels to be replaced with.The necessary components of the process are locating scars, finding the directional field, and the filling strategy.The strategy relies on the fact that in these linear scars, the ridge/valley pattern is still intact across the scar region.Using this information, the scar boundary is filled with appropriate normal region pixels using the local orientation field.This process can act as front-end to the subsequent Gabor and anisotropic diffusion filtering.

Modular multiplication using the core function in the residue number system

Modular multiplication can be performed in the residue number system (RNS) using a type of Montgomery reduction. This paper presents an alternative in which RNS modular multiplication are performed by using the core function. All of the intermediate calculations use short wordlength operations within the RNS. This work contributes to the long wordlength modular multiplication operation

High-performance elliptic curve cryptography processor over NIST prime fields

Z = A \times B \mod M

FPGA-based efficient modular multiplication for Elliptic Curve Cryptography

Z=A×BmodM, the basis of many DSPs and public-key cryptosystems.

High-throughput multi-key elliptic curve cryptosystem based on residue number system

Cryptographic devices, even after recent improvements, are still vulnerable to side channel attacks(SCA). The majority of the available literature of SCA belongs to the traditional methods such as simple and differential analysis methods and template attacks, whilst few studies based on machine learning are available. In this paper, we investigate the side channel analysis based on machine learning techniques in the form of principal component analysis (PCA) and support vector machine (SVM). For this purpose, we verify the efficiency of RBF and POLY kernel functions of SVM classifier under the influence of the number of principal components (PCs). Our experimental results, obtained by cross validation method, comprise the accuracy and computational complexity of this method and can show the validity and the effectiveness of the proposed approach.