Eike Linn
RWTH Aachen University
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Publication
Featured researches published by Eike Linn.
Nature Communications | 2013
Ilia Valov; Eike Linn; Stefan Tappertzhofen; S. Schmelzer; J. van den Hurk; F. Lentz; Rainer Waser
Redox-based nanoionic resistive memory cells are one of the most promising emerging nanodevices for future information technology with applications for memory, logic and neuromorphic computing. Recently, the serendipitous discovery of the link between redox-based nanoionic-resistive memory cells and memristors and memristive devices has further intensified the research in this field. Here we show on both a theoretical and an experimental level that nanoionic-type memristive elements are inherently controlled by non-equilibrium states resulting in a nanobattery. As a result, the memristor theory must be extended to fit the observed non-zero-crossing I-V characteristics. The initial electromotive force of the nanobattery depends on the chemistry and the transport properties of the materials system but can also be introduced during redox-based nanoionic-resistive memory cell operations. The emf has a strong impact on the dynamic behaviour of nanoscale memories, and thus, its control is one of the key factors for future device development and accurate modelling.
Nanotechnology | 2012
Eike Linn; Roland Rosezin; Stefan Tappertzhofen; Ulrich Böttger; Rainer Waser
The realization of logic operations within passive crossbar memory arrays is a promising approach to expand the fields of application of such architectures. Material implication was recently suggested as the basic function of memristive crossbar junctions, and single bipolar resistive switches (BRS) as well as complementary resistive switches (CRS) were shown to be capable of realizing this logical functionality. Based on a systematic analysis of the Boolean functions, we demonstrate here that 14 of 16 Boolean functions can be realized with a single BRS or CRS cell in at most three sequential cycles. Since the read-out step is independent of the logic operation steps, the result of the logic operation is directly stored to memory, making logic-in-memory applications feasible.
IEEE Electron Device Letters | 2011
Roland Rosezin; Eike Linn; Lutz Nielen; C Kügeler; Rainer Bruchhaus; Rainer Waser
Recently, the sneak-path obstacle in passive crossbar arrays has been overcome by the invention of complementary resistive switches (CRSs) consisting of two bipolar antiserially connected memristive elements. Here, we demonstrate the vertical integration of CRS cells based on Cu/SiO2/Pt bipolar resistive switches. CRS cells were fabricated and electrically characterized, showing high resistance ratios (Roff/Ron >; 1500) and fast switching speed (<; 120 μs). The results are one step further toward the realization of high-density passive nanocrossbar-array-based gigabit memory devices.
IEEE Electron Device Letters | 2011
Roland Rosezin; Eike Linn; Carsten Kügeler; Rainer Bruchhaus; Rainer Waser
Memristive switches are promising devices for future nonvolatile nanocrossbar memory devices. In particular, complementary resistive switches (CRSs) are the key enabler for passive crossbar array implementation solving the sneak path obstacle. To provide logic along with memory functionality, “material implication” (IMP) was suggested as the basic logic operation for bipolar resistive switches. Here, we show that every bipolar resistive switch as well as CRSs can be considered as an elementary IMP logic unit and can systematically be understood in terms of finite-state machines, i.e., either a Moore or a Mealy machine. We prove our assumptions by measurements, which make the IMP capability evident. Local fusion of logic and memory functions in crossbar arrays becomes feasible for CRS arrays, particularly for the suggested stacked topology, which offers even more common Boolean logic operations such as and and nor .
Proceedings of the IEEE | 2010
Victor V. Zhirnov; Ralph K. Cavin; Stephan Menzel; Eike Linn; Sebastian Schmelzer; Dennis Bräuhaus; C. Schindler; Rainer Waser
Many memory candidates based on beyond complementary metal-oxide-semiconductor (CMOS) nanoelectronics have been proposed, but no clear successor has yet been identified. In this paper, we offer a methodology for system-level analysis and address the relationship of the maximum performance of a given memory device type to device physics. The method is illustrated for the classical dynamic RAM (DRAM) device and for the emerging memory device known as the resistive RAM (ReRAM).
Nanotechnology | 2011
Stefan Tappertzhofen; Eike Linn; Lutz Nielen; Roland Rosezin; Florian Lentz; Rainer Bruchhaus; Ilia Valov; Ulrich Böttger; Rainer Waser
Complementary resistive switches (CRS) were recently suggested to solve the sneak path problem of larger passive memory arrays. CRS cells consist of an antiserial setup of two bipolar resistive switching cells. The conventional destructive readout for CRS cells is based on a current measurement which makes a considerable call on the switching endurance. Here, we report a new approach for a nondestructive readout (NDRO) based on a capacity measurement. We suggest a concept of an alternative setup of a CRS cell in which both resistive switching cells have similar switching properties but are distinguishable by different capacities. The new approach has the potential of an energy saving and fast readout procedure without decreasing cycling performance and is not limited by the switching kinetics for integrated passive memory arrays.
IEEE Transactions on Circuits and Systems | 2014
Eike Linn; Anne Siemon; Rainer Waser; Stephan Menzel
Highly accurate and predictive models of resistive switching devices are needed to enable future memory and logic design. Widely used is the memristive modeling approach considering resistive switches as dynamical systems. Here we introduce three evaluation criteria for memristor models, checking for plausibility of the I-V characteristics, the presence of a sufficiently nonlinearity of the switching kinetics, and the feasibility of predicting the behavior of two antiserially connected devices correctly. We analyzed two classes of models: the first class comprises common linear memristor models and the second class widely used nonlinear memristive models. The linear memristor models are based on Strukovs initial memristor model extended by different window functions, while the nonlinear models include Picketts physics-based memristor model and models derived thereof. This study reveals lacking predictivity of the first class of models, independent of the applied window function. Only the physics-based model is able to fulfill most of the basic evaluation criteria.
IEEE Journal on Emerging and Selected Topics in Circuits and Systems | 2015
Anne Siemon; Stephan Menzel; Rainer Waser; Eike Linn
Redox-based resistive switching devices (ReRAM) are an emerging class of nonvolatile storage elements suited for nanoscale memory applications. In terms of logic operations, ReRAM devices were suggested to be used as programmable interconnects, large-scale look-up tables or for sequential logic operations. However, without additional selector devices these approaches are not suited for use in large scale nanocrossbar memory arrays, which is the preferred architecture for ReRAM devices due to the minimum area consumption. To overcome this issue for the sequential logic approach, we recently introduced a novel concept, which is suited for passive crossbar arrays using complementary resistive switches (CRSs). CRS cells offer two high resistive storage states, and thus, parasitic “sneak” currents are efficiently avoided. However, until now the CRS-based logic-in-memory approach was only shown to be able to perform basic Boolean logic operations using a single CRS cell. In this paper, we introduce two multi-bit adder schemes using the CRS-based logic-in-memory approach. We proof the concepts by means of SPICE simulations using a dynamical memristive device model of a ReRAM cell. Finally, we show the advantages of our novel adder concept in terms of step count and number of devices in comparison to a recently published adder approach, which applies the conventional ReRAM-based sequential logic concept introduced by Borghetti et al.
IEEE Electron Device Letters | 2014
Stefan Tappertzhofen; Eike Linn; Ulrich Böttger; Rainer Waser; Ilia Valov
The impact of the recently discovered nanobattery effect on the switching, the endurance, and the retention of resistive random access memory devices is demonstrated. We show that the relaxation of the electromotive force voltage may lead to a shift of the resistance level for high resistive states, which is included into device modeling. Based on the extended memristive device model, which accounts for the nanobattery effects, endurance and retention problems can be explained.
IEEE Electron Device Letters | 2013
Sebastian Schmelzer; Eike Linn; Ulrich Böttger; Rainer Waser
Tantalum oxide (TaOx) is an advantageous material system to realize complementary resistive switches, but the ON-window starts to shrink after a few cycles in the voltage sweep mode. A power analysis reveals the presence of power boosts during conventional voltage sweeps in the nonswitching part cell. This power stress is significantly reduced by the use of current sweeps with voltage compliance, leading to very reproducible switching. The endurance is raised to >; 30000 cycles.