Eise C. Dijkmans

A single battery, 0.9 V operated digital sound processing IC including AD/DA and IR receiver with 2 mW power consumption

The sound processing on this chip is done digitally by a programmable DSP processor. The sound processing algorithms are stored in an on-chip RAM. A new algorithm can be downloaded into the RAM through an infrared (IR) remote control. The onboard A/D and D/A converter and IR receiver make this chip a complete stand alone system, needing only a battery, a microphone and/or telecoil, an earphone, an IR diode and few external components. Applications are in hearing instruments and related products. The chip is supplied by a single 1.3V battery, runs at 1MHz clock frequency and consumes only 2mW in full functional mode. The audio sample rate is 16kHz. The dynamic ranges of the A/D and D/A converter (including digital filters, noise shaper and output amplifiers) are 80dBA and 93dBA respectively. The THD of the overall signal path is better than -45dB. The chip is manufactured in a standard low-threshold 0.8/spl mu/m CMOS process.

A 13 mW 500 kHz data acquisition IC with 4.5 digit DC and 0.02% accurate true-RMS extraction

This mixed-signal 0.5 /spl mu/m CMOS data-acquisition IC uses a second-order 5b /spl Sigma//spl Delta/ modulator for A/D conversion of a 500 kHz input bandwidth. Signal properties like DC, true-RMS (TRMS), peak and frequency are extracted in the digital domain. The article shows a traditional data-acquisition block diagram. Analog filtering extracts DC and RMS value, peak min/max and frequency. A high-resolution A/D converter (100 dB for 4.5 digit resolution) digitizes the resulting low-frequency signal (typically 2 Hz). If waveform display of the input signal is desired, a separate 6-8b high-speed A/D converter is required. One of the problems with such an acquisition system is the analog RMS converter, which requires bulky external filter capacitors, is slow responding (especially for low-level inputs), has limited dynamic range, and has limited bandwidth when operated at low power.

Signal converter with digital/analog conversion and noise-dependent variability of output signal bandwidth

A signal converter includes a digital/analog converter and a low pass filter. The converter includes control means for amending the ratio of sampling frequencies of the D/A input signal and the D/A output signal or of the low pass filter.

Signal/Quantizing-distortion ratio measurements of fast-adaptive delta modulation systems

Signal/quantizing-distortion ratio (SQDR) was measured as a function of input level at a sampling frequency of 64 kHz with a phase- and amplitude-modulated sine wave of 800 Hz as input signal for different adaptive delta modulation systems. The parameters are: the number of bits taken into account in deciding step-size changes (bit-memory length); the ratio between the number of successive identical bit repetitions after which the step size is increased and the number of consecutive bit alternations after which the step size is decreased (up/down ratio); the step-size change factor a; and the use of single or double integration. Only one parameter is changed at a time resulting in a total of 54 measurement curves of SQDR as a function of input level. An analysis of the measurements is presented in terms of an averaged SQDR and its systematic spread as a function of the parameters.