Rudy J. Van De Plassche

A monolithic 14 bit A/D converter

A 14-bit monolithic successive approximation A/D converter with 7-usec conversion time is described. The high linearity of the converter (± 1/4 LSB ) results in an 84 dB S/N ratio. A low-noise, high-stability reference source completes the A/D function.

High-speed A/D converters

The best-known architecture for a high-speed analog-to-digital converter is the flash converter structure. In this structure an array of comparators compares the input voltage with a set of increasing reference voltages. The comparator outputs represent the input signal in a digital (thermometer) code which can be easily converted into a Gray or binary weighted output code. The flash architecture shows a good speed performance and can easily be implemented in an integrated circuit as a repetition of simple comparator blocks and a (ROM) decoder structure. However, this architecture requires 2 N -1 comparators to achieve an N-bit resolution. The parallel structure makes it difficult to obtain a high-resolution while maintaining at the same time a large bandwidth, a low power consumption, and a small die size. Interpolation between reference levels reduces the number of reference taps and input amplifiers resulting in a lower power consumption. The influence of offset voltages in the input amplifiers can be reduced by using averaging between active amplifier stages. At the same time, signal-to-noise ratio is improved without using more power. An alternative to the full-flash architecture is the multi-step A/D conversion or sub ranging principle. In highspeed converters the two-step architecture is the most popular because of the ease of implementation. However, a two-step architecture must be preceded by a sample-and-hold amplifier which performs the sampling of the analog input signal. In the two-step architecture a coarse and fine quantization takes place. These succeeding conversion steps need time. The sample-andhold operation on the signal keeps the sampled signal constant. During this “hold” time the conversion takes place, making it virtually “timeless.” After the coarse quantization is performed, the digital signal is applied to a D/A converter to reconstruct the analog signal. This reconstructed signal is subtracted from the analog input signal which is held by the sample-andhold amplifier. After subtraction has taken place the residue signal can be amplified and is then applied to the fine quantizer which performs the conversion into a digital value. The coarse plus fine output code with, in many cases, an error correction operation results in the final digital output word. A good balance between circuit complexity, power consumption, and die size is obtained in this type of converter. The final dynamic performance, however, depends substantially on the quality and dynamic performance of the sample-and-hold amplifier.

Power and Scaling Rules of CMOS High-Speed A/D Converters

Embedded high-speed A/D converters are required in numerous applications. Since CMOS is the main stream technology for digital system integration, design of the A/D converter in the same technology is to be preferred. A/D converters based on a folding architecture are capable to fulfill the increasing demand for performance to such embedded A/D converters. This paper describes CMOS technology directions and trends related to the performance of folding A/D converters. As an example the design of a 40 MHz 8-bit folding A/D converter in 0.35 μm technology is described. The A/D converter uses a supply voltage of 2.5 V and has a power dissipation of 28 mW.

Noise-shaping coding

In this chapter noise-shaping techniques to improve the dynamic range of a system will be described. Noise-shaping can be very useful when speed can be exchanged with accuracy. The quantization errors in a noise-shaping system are removed from the signal band of interest. Mostly the suppressed quantization errors appear enlarged as out-of-band noise in the system. With a simple filter these errors are removed. An increased dynamic range of the coder is obtained. In digital systems word length can intelligently be reduced using a noise-shaping operation without losing dynamic range significantly. An ultimate in bit reduction is obtained when the noise-shaping operation reduces the number of bits to 1. Examples of such an operation is sigma-delta analog-to-digital conversion or noise-shaping digital-to-analog conversion based on single-bit word-lengths. The advantage of a 1-bit converter is the extreme linearity of such a device. A very good differential linearity is obtained with these converters. The most important design criteria for these converters will be given. At the moment the dynamic range of a system must be enlarged, but the maximum clock rate of the system cannot be increased because of technology limitations, then a multi-bit digital-to-analog converter can be used in the feedback loop. At that moment, however, the linearity of the digital-to-analog converter determines the linearity and the distortion in the system.

High Speed Folding ADC’s

This paper describes the evolution steps used within the Philips company on the development of a high speed analog to digital converter (ADC) with a low power consumption and a small die size. Analog preprocessing of the input signal before conversion to binary information is a key function in all the explained systems.

Specifications of converters

To obtain insight into the design criteria for converters it is important to arrive at a unanimous definition of specifications. These specifications must include the application of converters in conversion systems (see references [14, 15]). Dynamic specifications of converters are needed to obtain insight in the applicability of a certain converter in a digital signal processing system: for example, digital audio or digital video. In a conversion system the complete conversion from analog into digital or digital into analog information is performed. Such systems include input or output amplification and anti-alias filtering.

Sigma-delta converters

In this chapter noise-shaping techniques applied to analog-to-digital converter systems will be described. Noise-shaping is very useful when speed can be exchanged with accuracy. In reference [96] an overview of theoretical and practical aspects of oversampling converters is given. The quantization errors in a noise-shaping system are removed from the signal band of interest. Furthermore, in an analog-to-digital converter system the input noise is filtered out by the input noise-shaping function. As a result, a reduced bandwidth can be used compared to, for example, successive approximation conversion methods. Again, the removed quantization errors appear with larger amplitudes as out-of-band noise in the system. With a digital filter these errors are removed. An increased dynamic range of the system is obtained. An example of such an operation is sigma-delta analog-to-digital conversion using single bit word-lengths [93,98,97]. The advantage of a 1-bit converter is the extreme linearity of such a device. A very good differential linearity is obtained with these converters. The most important design criteria will be given. The dynamic range performance is related to the noise-shaping coders described in Chapter 10. At the moment the dynamic range of a system must be enlarged, but the maximum clock rate of the system cannot be increased because of technology limitations, then a multi-bit digital-to-analog converter can be used in the feedback loop.

Voltage and current reference sources

In A/D and D/A converters the full-scale value is determined by the reference source. A low noise and low temperature coefficient of the output signal of the reference source is very important for high-resolution, high-accuracy converters. A well-known device for stabilizing a reference voltage is a zener diode. In integrated circuits, however, the zener diode can cause problems with the reliability of the circuit. In modern technologies it is not always possible to reverse-bias the emitter-base junction of a transistor to obtain a zener diode operation. The yield of circuits is reduced by reverse-biasing transistors. Today’s reference sources are built using the band-gap voltage of silicon as a low-temperature dependent reference voltage. In this chapter different circuits will be described that use the band-gap principle to stabilize a voltage or a current. Examples of band-gap reference voltages are given in references [76,77,79].

High-accuracy D/A converters

High-resolution monolithic D/A converters are subject to growing interest due to the rapidly expanding market for digital signal processing systems. An example of such a market is digital audio. The large dynamic range of a digital audio system requires converters with resolutions of 16 to 20 bits. Monolithic converters with such a high linearity are difficult to design and require special circuit configurations. The most simple types of D/A converters are obtained with pulse-width modulation systems. These systems require fast logic circuits. In a pulse-width D/A converter structure an output low-pass filter reconstructs the analog signal and removes the modulation signal. Maximum speed of these types of converters is limited to the kHz range. The advantage of these systems is the small amount of accurate components that are needed in a practical implementation.

High-accuracy A/D converters

High-resolution monolithic A/D converters are subject to growing interest due to the rapidly expanding market for digital signal processing systems. The introduction of digital audio recording equipment such as the Digital Compact Cassette (DCC) players requires resolutions of 16 to 18 bits. Monolithic converters with such a high linearity are difficult to design and require special circuit configurations. When a low conversion speed is needed, integrating types of converters can be used. In integrating types of high-resolution A/D converters basically the analog input signal is converted into a time which is proportional to the input signal. Time is measured using a counter with an accurate clock. These systems are relatively slow because of the counting operation in the time-to-number conversion cycle. A speed improvement is obtained by using a coarse and fine conversion cycle in the time-to-number counting operation. A well-known analog-to-digital converter based on this system is the dual slope converter. This converter is mostly used in digital voltmeters.