Eleonora Franchi

A 0.83-2.5-GHz continuously tunable quadrature VCO

A quadrature VCO with /spl plusmn/50% continuous 0.83-2.5-GHz tuning range is presented. It is based on a core LC-QVCO with /spl plusmn/20% tuning range, a single sideband mixer (SSBM), two frequency dividers and a multiplexer. The circuit has been implemented in a 0.13-/spl mu/m 1.2-V CMOS technology. The additional area with respect to the core LC-QVCO is 100 /spl mu/m/spl times/100 /spl mu/m. Quadrature error is less than 2/spl deg/; the phase noise is less than -120 dBc/Hz @ 1 MHz over the whole tuning range and is mainly due to the LC-QVCO. Spurs are more than 34 dB below the fundamental in the worst case.

Analog synthesis of nonlinear functions based on fuzzy logic

A circuit for the analog implementation of nonlinear functions has been designed. It is based on the fuzzy-logic paradigm mapped into a modular architecture. The basic building blocks rely on the large-signal characteristic of MOS differential pairs to design bell-shaped basis functions and combine them with the center-of-gravity method. The actual input/output (I/O) characteristics are defined by applying proper voltage levels to the high-impedance input nodes of each module. Both a field-programmable processor, where the programming configuration is stored in a digital RAM, and a tool for generating the layout of dedicated circuits, where this connection is hardwired, have been designed using a CMOS 0.7 /spl mu/m n-well technology. A software layer computes the programming values which allow the circuit response to approximate the target I/O relationship. Experiments show that the approximation accuracy is in the range of a few percent r.m.s. of the circuit output range. The application of the system to the synthesis of a nonlinear control law for a DC-DC power converter is discussed.

Random access analog memory for early vision

Early-vision problems require huge amounts of computer power. The utilization of analog circuits to cope with this problem has been hampered by the lack of an efficient way to store images for a discrete amount of time. In this communication, we investigate the use of an analog memory as a full-frame buffer. Two different momories have been built using a standard CMOS-ASIC process. Measurements carried out on these circuits and an analysis of their area occupation show the advantage of using analog storage for full-frame buffers.

Quadrature VCOs based on direct second harmonic locking: Theoretical analysis and experimental validation

We propose a theoretical analysis of the class of quadrature VCOs (QVCOs) based on two LC‐oscillators directly coupled by means of the second harmonic. The analysis provides the conditions for the existence and stability of steady‐state quadrature oscillations and a simplified model for the phase noise (PN) transfer function with respect to a noise source in parallel to the tank. We show that the figure of merit defined as the product between PN and current equals that of the single VCO, confirming that quadrature generation is achieved by this class of QVCO without degrading that figure of merit. An analytical model for the phase quadrature error due to tank mismatches is also proposed. The validity of all analytical models is discussed against numerical simulations. A practical implementation at 3.26 GHz with ±20% tuning range in a 0.13µm CMOS technology is also presented, confirming the main theoretical findings. Copyright

A silicon compiler of analog fuzzy controllers: from behavioral specifications to layout

In this paper, a silicon compiler for analog fuzzy controllers is described. The layout is generated automatically, starting from global-system specifications accepted as a set of classical fuzzy rules involving fuzzy sets as well as numerical data, often available from numerical examples. The system relies on a library of basic cells designed using a CMOS n-well 0.7 /spl mu/m technology and on the use of Cadence software. Multi-inputs multi-outputs fuzzy logic-based controllers are synthesized, and the area and power requirements by any specific application are optimized. Some prototypes designed using the proposed methodology have been fabricated. For example, a two-inputs two-outputs fuzzy controller implementing a 2D rational function and a sinusoidal function requires, including the I/O circuitry, 1.9 mm/sup 2/ of silicon area, and the total power consumption is 44 mW at 5 V power supply. The maximum propagation delay, assuming a step input function, is 0.57 /spl mu/sec. The total computation time using a SUN Sparc2 Workstation is about 25 min, from specification of the expected behavior to layout.

Active electrode IC combining EEG, electrical impedance tomography, continuous contact impedance measurement and power supply on a single wire

The IC presented integrates the front-end for EEG and Electrical Impedance Tomography acquisition on the electrode, together with contact impedance monitoring, so as to improve signal quality and functional integration of the two techniques for brain imaging applications. Only 4 wires connect the electrode to the back-end. The readout circuit consumes 1 mW, while the input referred noise for EEG signal acquisition is 0.45 μVRMS between 0.5 and 100 Hz, doubling when both EEG and EIT are acquired simultaneously.

Quadrature VCO based on direct second harmonic locking

The paper proposes a quadrature VCO based on two LC-oscillators directly coupled by means of second harmonic such that extra inductors or extra current are not required. A simple model is presented clarifying the following points: i) existence and stability of steady state solutions, ii) phase noise transfer function, iii) phase deviation from ideal quadrature versus tank mismatches. A design is presented in CMOS 0.13 /spl mu/m technology, operating at 1.8GHz, 1.2V supply, with 4 mA total current consumption. Simulation results exhibit -128 dBc/Hz at 1 MHz phase noise and 2/spl deg/ quadrature error for 0.5% mismatch between the two tanks.

Automatic synthesis of analog fuzzy controllers: a hardware and software approach

In applications where low cost is the primary concern, analog VLSI controllers are an option. In this paper a hardware and software integrated toolkit for development of analog controllers based on fuzzy logic is presented. The system is composed of a CMOS analog circuit whose input/output relationship can be programmed to synthesize various control functions. The value of the programmable parameters can be automatically computed by the software tool, assuming that the user specifies the controller expected behavior by means of linguistic and/or numeric information. A complete example of how fuzzy linguistic and numerical methodologies can be combined with more conventional techniques to synthesize a nontrivial controller is detailed down to measured data. A final discussion clarifies the main advantages of the fuzzy analog computation when it is supported with an appropriate software layer: nontrivial solutions to problems in which accuracy is not the primary concern can be easily synthesized and integrated into very small silicon areas with small power requirements.

Reconfigurable MEMS-enabled LC-tank for multi-band CMOS oscillator

A wide frequency span reconfigurable MEMS-enabled LC-tank network for a multi-band RF oscillator is implemented, made of ohmic RF-MEMS switches, spiral suspended inductors and metal-insulator-metal (MIM) capacitors all integrated on a high resistivity silicon MEMS substrate. The LC-tank is connected to a differential cross-coupled n-MOS pair on a separate CMOS substrate, by chip-on-chip integration and wire bonding, leading to the complete MEMS-CMOS oscillator prototype. The separate LC-tank and the complete oscillator are both tested on-wafer through RF-probing. Measurement results show two resonance frequencies of 1.375 GHz (Q = 7.2) and 3.605 GHz (Q = 14.4) for the MEMS-enabled LC-tank. The MEMS-CMOS oscillator shows a phase noise of -124.5 dBc at 1MHz frequency offset, with 3mA bias current at 1.2 V power supply. Overall oscillator performances well compare with state-of-the-art non-reconfigurable CMOS oscillator designs.

Input/Output Pad for Direct Contact and Contactless Testing

Non-contact probing can provide an important contribution for testing complex Systems-on-a-Chip (SoC), Systems-in-a-Package (SiP) and Through-Silicon-Vias (TSV) interconnections. This paper demonstrates the feasibility of wireless testing by capacitive coupling between a cantilever probe card and a pad. In particular a scheme of an I/O pad suitable for both contact and contactless probing is proposed.