Emil Dumitrescu

Nodes self-scheduling approach for maximising wireless sensor network lifetime based on remaining energy

Coverage and energy conservation are two major issues in wireless sensor networks (WSNs), especially when sensors are randomly deployed in large areas. In such WSNs, sensors are equipped with limited lifetime batteries and redundantly cover the target area. To face the short lifetime of the WSN, the objective is to optimise energy consumption while maintaining the full sensing coverage. A major technique to save the energy is to use a wake-up scheduling protocol through which some nodes stay active whereas the others enter sleep state so as to conserve their energy. This study presents an original algorithm for node selfscheduling to decide which ones have to switch to the sleep state. The novelty is to take into account the remaining energy at every node in the decision of turning off redundant nodes. Hence, the node with a low remaining energy has priority over its neighbours to enter sleep state. The decision is based on a local neighbourhood knowledge that minimises the algorithm overhead. To verify and evaluate the proposed algorithm, simulations have been conducted and have shown that it can contribute to extend the network lifetime. A comparison with existing works is also presented and the performance gains are highlighted.

A supervisor implementation approach in Discrete Controller Synthesis

We investigate the implementation of supervisors generated by symbolic BDD-based Discrete Controller Synthesis (DCS). The implementation technique proposed is able to solve both control non-determinism and the structural incompatibility introduced by symbolic DCS. We highlight and illustrate interesting structural properties of the supervisor implementation. Our technique is illustrated on a reallife example modeling a System-on-chip component: a serial to parallel converter.

Multicriteria optimal reconfiguration of fault-tolerant real-time tasks

Abstract We propose a technique for discrete controller synthesis, with optimal synthesis on bounded paths, in order to model, design, and optimize fault-tolerant distributed systems, taking into account several criteria (e.g., the execution costs of the tasks and their quality of service). Different combinations are explored for multi-criteria optimization.

Efficient Control Allocation for Fault Tolerant Embedded Systems on Small Autonomous Aircrafts

In this paper, a control allocation module with explicit laws has been designed for fast operation and low computational load, so that this algorithm can run in a small processor or microcontroller with limited floating point operation capability. The control allocation method is capable of compensating for actuator faults. Given the appropriate fault detection system, there is no need to redesign the controller, since the control allocator compensates for any fault occurring. A comparison shows that this method yields satisfactory results, provides optimal solutions in some cases, and is simpler and faster than conventional methods.

OPTIMAL DISCRETE CONTROLLER SYNTHESIS FOR MODELING FAULT-TOLERANT DISTRIBUTED SYSTEMS

Abstract We propose a safe design method for safe execution systems, based on fault-tolerance techniques: it uses optimal discrete controller synthesis (DCS) to generate a correct-by-construction fault-tolerant system. The properties enforced concern consistent execution, functionality fulfillment (whatever the faults, under some failure hypothesis), and several optimizations (of the tasks’ execution time). We propose an algorithm for optimal DCS on bounded paths. We propose model patterns for a set of periodic tasks with checkpoints, a set of distributed, heterogeneous and fail-silent processors, and an environment model that expresses potential fault patterns. The implementation is illustrated using the Sigali symbolic DCS tool and the Mode Automata programming language.

Automatic error correction based on discrete controller synthesis

The Discrete Controller Synthesis technique is used for automatic correction of design bugs in discrete event systems. A design method is proposed and illustrated extensively on a simple yet realistic example, modelling a serial to parallel converter. Simulation results show that this automatic error correction method can effectively mask errors without human intervention inside the design code. This automatic approach is more efficient and reliable than the traditional manual bug correction.

A Design Method for Synthesizing Control-Command Systems out of Reusable Components

This paper investigates an industrial design issue related to code reusability: building control-command systems out of Commercial off the shelf (COTS) components. The design method proposed uses in synergy the formal verification (FV) and the discrete controller synthesis (DCS) techniques. COTS are formally specified using temporal logic and/or executable observers, and coded according to their formal specification. New functions are built by assembling COTS together. The COTS assembly operation is not error free: the resulting assembly may not achieve the desired function it is supposed to. For these reasons, COTS assemblies need to be formally verified and if errors are found, they must be corrected using DCS. The resulting system is ready for hardware (e.g. FPGA) implementation.

A Design Method for WSN's Automatic Scheduling Generation

This work explores and advocates the use of automatic generation of local schedulers, with an application to the design of Wireless Sensors Networks (WSN). The contribution presented is a design method relying on formal tools, as well as a solution to the distribution problem of global scheduling solutions. This approach is illustrated and its feasibility is proven on a small example. The scalability aspect is also assessed, and it is shown that by the means of manual, but feasible effort, theoretical complexity limitations of formal tools can be efficiently handled.

Automatic Generation of Wireless Sensor Networks Scheduling

In this paper, the Discrete Controller Synthesis (DCS) technique is applied in order to obtain a correct-by- construction automatic distributed scheduling of Wireless Sensor Network (WSN). Our approach starts from an abstract formal model considering that communication between nodes are instantaneous. Then, a refined model is obtained by adding a realistic communication mechanism while preserving the global controlled behavior generated initially by automatic synthesis. This communication mechanism is called a synchronization “barrier“: a software mechanism constraining a set of sensors to wait for each other before making its own local decision and before deactivation. The approach is illustrated by a WSN model with two communicating nodes.

Incremental Discrete Controller Synthesis for communicating systems based on modular decomposition

The symbolic Discrete Controller Synthesis (DCS) is applied incrementally on successive abstractions of the system to be controlled, which is composed of two or more concurrent communicating components. We keep one component while abstract away all others. DCS is applied on the resulting abstract system and produces an intermediate approximate control solution. We refine the abstract model incrementally by adding concrete model of the abstracted components one by one. At each refinement, the previous intermediate solution is used as a starting point synthesizing a more precise solution until the precise supervisor is reached. The efficiency of the incremental technique is illustrated with performance assessments on several models.