En-Xiao Liu

Compact Wideband Equivalent-Circuit Model for Electrical Modeling of Through-Silicon Via

This paper presents a compact wideband equivalent circuit model for electrical modeling of through-silicon vias (TSVs) in 3-D stacked integrated circuits and packaging. Rigorous closed form formulas for the resistance and inductance of TSVs are de rived from the magneto-quasi-static theory with a Fourier-Bessel expansion approach, whereas analytical formulas from static solutions are used to compute the capacitance and conductance. The equivalent-circuit model can capture the important parasitic effects of TSVs, including the skin effect, proximity effect, lossy effect of silicon, and semiconductor effect. Therefore, it yields accurate results comparable to those with 3-D full-wave solvers.

A Semi-Analytical Approach for System-Level Electrical Modeling of Electronic Packages With Large Number of Vias

This paper presents a semi-analytical approach for electrical performance modeling of complex electronic packages with multiple power/ground planes and large number of vias. The method is based on the modal expansion technique and the method of moments. For the inner package domain with multiple power/ground planes and many vias, the modal expansion method is employed to compute the electromagnetic fields from which the multiport network parameters, e.g., the admittance matrix can be easily obtained. For the top/bottom domain of signal layers, the moment method is used to extract the equivalent resistance, inductance, capacitance, and conductance (RLCG) parameters. The equivalent circuit for the entire package is then generated by combining the results for both package domains. The equivalent circuit can be used in a SPICE-like simulator to study the signal and power integrity of an electronic package. Numerical examples demonstrate that the new approach is able to provide fast yet accurate signal and power integrity analysis of multilayered electronic packages.

Efficient Modeling of Rerouted Return Currents in Multilayered Power-Ground Planes by Using Integral Equation

Multilayered power-ground (PG) planes are commonly used to supply power to circuits in high-speed electronic packages and printed circuit boards (PCBs). In this paper, we propose an efficient integral equation equivalent network method to simulate the interference produced by the rerouted return currents of signal traces inside such PG planes. The integral equation is created based on the geometrical features of the PG planes. Therefore, it could reduce the computing time and will be maintaining good accuracy. By discretizing the integral equation, a multiport equivalent network model is derived for each layer of the PG planes. Their [Z] matrices are then obtained. These [Z] matrices can be smoothly integrated with signal traces and other circuit models of lumped components mounted in the package and on the PCB, so that the system-level signal integrity and power integrity can be simulated efficiently.

Novel Methods for Modeling of Multiple Vias in Multilayered Parallel-Plate Structures

This paper presents novel modeling methods for accurate and efficient analysis of coupling of multiple vias in finite-sized multilayered parallel-plate structures. The new modeling methods address two open problems related to the modal expansion with the T-matrix method for the analysis of via coupling. First, a novel boundary modeling method, called the frequency-dependent cylinder layer (FDCL), is proposed to resolve the open problem of boundary modeling. In the FDCL, virtual cylinders with dynamic radii are postulated to approximate the original finite-sized boundary of parallel-plate structures. Second, a generalized T-matrix model, which is derived by the mode-matching technique, is created to characterize the coupling effect for vias penetrating more than one layer in a multilayered structure. With the two open problems successfully solved, the modal expansion with the T-matrix method incorporating the FDCL boundary modeling method and the generalized T-matrix model can now be fully utilized for efficient and accurate analysis of finite-sized multilayered parallel-plate structures with a large number of vias. Both numerical and experimental verifications are presented to validate the new modeling methods.

Systematic Microwave Network Analysis for Multilayer Printed Circuit Boards With Vias and Decoupling Capacitors

An efficient microwave network method is proposed for signal and power integrity analysis of a multilayer printed circuit board with multiple vias and decoupling capacitors. The multilayer parallel plate structure is described as a cascaded microwave network. The admittance matrix of a single plate pair with ports defined in via holes both on top and bottom plates is obtained through the intrinsic via circuit model and impedance matrix between two plates. A recursive algorithm is provided to obtain the combined admittance matrix of two layers of plate pair coupled through via holes on a common plate. Decoupling capacitors are naturally treated as impedance loads to the cascaded admittance network. Numerical simulations and measurements have been used to validate the method and good agreements have been observed. While the method is as accurate as full-wave numerical solvers, it achieves much higher efficiencies both in CPU time and memory requirements.

Interconnect design and analysis for Through Silicon Interposers (TSIs)

The trend of increasing digital system performance by downscaling the device size poses daunting challenges in system design due to the increased power density, higher I/O count, interconnect bandwidth, and timing closure requirements. Silicon carrier with Through Silicon Vias (TSVs) or TSI technology is identified as a system and packaging level solution to overcome all those challenges. In this paper we describe the key electrical elements in a typical TSI digital system and discuss their impact on overall system performance. We also discuss the system level power integrity analysis for TSI as its power delivery is one of the major engineering challenges.

An Effective and Efficient Approach for Radiated Emission Prediction Based on Amplitude-Only Near-Field Measurements

A new approach is proposed for modeling electromagnetic emissions of a printed circuit board (PCB) based on amplitude-only near-field measurement data. Magnetic dipoles placed over the top layer of the PCB are introduced as the equivalent of actual radiated sources. A restarted optimization procedure based on a differential evolution algorithm is developed to determine the parameters of the dipoles (number, position, and moment components) via minimizing the difference between the measured magnetic near field and that radiated by the dipoles. These equivalent dipoles can be used to predict the radiated emissions of the PCB once being determined. The proposed approach does not need the phase of the measured near fields, and its computational complexity is very low. Numerical results are presented to demonstrate the validity and efficiency of the proposed approach.

Cascaded Microwave Network Approach for Power and Signal Integrity Analysis of Multilayer Electronic Packages

In this paper, an efficient cascaded microwave network approach is presented for power and signal integrity analysis of multilayer printed-circuit boards (PCBs) and advanced electronic packages with multiple signal traces, multiple power-ground plates, multiple vias, and external loads such as decoupling capacitors. Each parallel-plate pair, which consists of two consecutive conductor plates functioning as either power or ground in the PCBs or packages, is modeled as one individual microwave network. Equivalent circuits are used in the microwave network to model the vias, and a parallel-plate impedance matrix is formulated to account for the wave interactions between the vias and the boundary of the PCB or package. If signal traces are present in a plate pair, a modal decomposition and recombination approach is employed to model two associated modes: the transmission line mode for the signal traces, and the parallel-plate mode for the power-ground plate pair. The microwave networks for each plate pair are finally cascaded together by enforcing the continuity of the voltages and currents at the via clearance holes in the conductor plate shared by two consecutive plate pairs. Numerical validation reveals that the cascaded microwave network approach produces accurate simulation results with much less central processing unit time and memory requirements than 3-D full-wave approaches.

Hybridization of the Scattering Matrix Method and Modal Decomposition for Analysis of Signal Traces in a Power Distribution Network

A hybrid scattering matrix method (SMM) and a modal decomposition technique for analysis of signal traces in the power distribution network of an electronic package are presented in this paper. Applying the modal decomposition of the waves propagating inside the power-ground (P-G) planes and the signal traces, the electromagnetic fields can be decomposed into the parallel-plate mode and the transmission-line mode. The former is analyzed by using the SMM for the finite P-G planes with multiple vias. The multiconductor transmission-line theory is applied to model the micro-stripline and stripline in the package. Numerical simulations are illustrated for coupling analysis of P-G vias to the signal traces in the package and examined through experimental and numerical validations.

Modeling of Advanced Multilayered Packages with Multiple Vias and Finite Ground Planes

A system-level modeling approach, which combines the MoM (method of moments) and the SMM (scattering matrix method) has been presented for the modeling of advanced electronic packages (Oo et al., 2007). The focus of this paper is on addressing the problems of multilayered multiple via coupling and finite ground effects by the SMM method. Significant extensions of the SMM method facilitate the modeling of coupling among densely populated vias in multilayered packages with finite power/ground planes. The proposed approach is suitable for the signal and power integrity, and even EMI analysis of packages at system level.