Enrico Macii

A Convolutional Neural Network Fully Implemented on FPGA for Embedded Platforms

Convolutional Neural Networks (CNNs) allow fast and precise image recognition. Nowadays this capability is highly requested in the embedded system domain for video processing applications such as video surveillance and homeland security. Moreover, with the increasing requirement of portable and ubiquitous processing, power consumption is a key issue to be accounted for.In this paper, we present an FPGA implementation of CNN designed for addressing portability and power efficiency. Performance characterization results show that the proposed implementation is as efficient as a general purpose 16-core CPU, and almost 15 times faster than a SoC GPU for mobile application. Moreover, external memory footprint is reduced by 84% with respect to a standard CNN software application.

Adaptive Task Migration Policies for Thermal Control in MPSoCs

In deep submicron circuits, high temperatures have created critical issues in reliability, timing, performance, coolings costs and leakage power. Task migration techniques have been proposed to manage efficiently the thermal distribution in multi-processor systems but at the cost of important performance penalties. While traditional techniques have focused on reducing the average temperature of the chip, they have not considered the effect that temperature gradients have in system reliability. In this work, we explore the benefits of thermal-aware task migration techniques for embedded multi-processor systems. We propose several policies that are able to reduce the average temperature of the chip and the thermal gradients with a negligible performance overhead. With our techniques, hot spots and temperature gradients are decreased up to 30% with respect to state-of-the-art thermal management approaches.

Graphene-PLA (GPLA): a Compact and Ultra-Low Power Logic Array Architecture

The key characteristics of the next generation of ICs for wearable applications include high integration density, small area, low power consumption, high energy-efficiency, reliability and enhanced mechanical properties like stretchability and transparency. The proper mix of new materials and novel integration strategies is the enabling factor to achieve those design specifications. Moving toward this goal, we introduce a graphene-based regular logic-array structure for energy efficient digital computing. It consists of graphene p-n junctions arranged into a regular mesh. The obtained structure resembles that of Programmable Logic Arrays (PLAs), hence the name Graphene-PLAs (GPLAs); the high expressive power of graphene p-n junctions and their resistive nature enables the implementation of ultra-low power adiabatic logic circuits.

An Efficient MPI Implementation for Multi-Coreneuromorphic Platforms

Multicore neuromorphic platforms come with a custom library for efficient development of neural network simulations. While these architectures are mainly focused on real-time biological network simulation using detailed neuron models, their application to a wider range of computational tasks is increasing. The reason is their effective support for parallel computation characterised by an intensive communication among processing nodes and their inherent energy efficiency. However, to unlock the full potential of these architectures for a wide range of applications, a library support for a more general computational model has to be developed. This work focuses on the implementation of a standard MPI interface for parallel programming of neuromorphic multicore architectures. The MPI library has been developed on top of the SpiNNaker multi-core neuromorphic platform, featuring a toroid interconnect and packet support for multicast communication. The proposed MPI implementation has been evaluated using an N-body simulation kernel, showing very good efficiency and suggesting that the considered neuromorphic platform with our MPI library is very promising for communication-intensive applications.