Erhan Ozalevli

A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering

A reconfigurable implementation of distributed arithmetic (DA) for post-processing applications is described. The input of DA is received in digital form and its analog coefficients are set by using the floating-gate voltage references. The effect of the offset and gain errors on DA computational accuracy is analyzed, and theoretical results for the limitations of this design strategy are presented. This architecture is fabricated in a 0.5-mum CMOS process, and configured as a 16-tap finite impulse response (FIR) filter to demonstrate the reconfigurability and computational efficiency. The measurement results for comb, low-pass, and bandpass filters at 32/50-kHz sampling frequencies are presented. This implementation occupies around 1.125 mm2 of die area and consumes 16 mW of static power. The filter order can be increased at the cost of 0.011 mm2 of die area and 0.02 mW of power per tap.

A Precision High-Voltage Current Sensing Circuit

This paper presents a precision current sensor featuring a high voltage, high gain (~ 140 dB), and low input offset ( < 1 mV) current sense amplifier. This amplifier does not require offset trimming even for low offset applications. It is a single stage amplifier that has a common gate pMOS differential input pair, which makes it inherently stable. This amplifier topology allows for a wide input common-mode range, thus increasing the versatility of current sensing circuit.

Tunable Highly Linear Floating-Gate CMOS Resistor Using Common-Mode Linearization Technique

In this paper, an implementation of a tunable highly linear floating resistor that can be fully integrated in CMOS technology is presented. The second-order effects of a single MOS transistor operating in the triode operation regime are described, and a common-mode linearization technique is applied to suppress these nonlinearities. This technique is implemented by utilizing a low-power circuit design strategy that exploits the capacitive coupling and the charge storage properties of floating-gate transistors. The resistance of the proposed circuit is tuned by utilizing the Fowler-Nordheim tunneling and hot-electron injection quantum-mechanical phenomena. We demonstrate the use of this resistor in highly linear amplifier. We present experimental data from the chips that were fabricated in a 0.5- CMOS process. We show that this resistor exhibits 0.024% total harmonic distortion (THD) for a sine wave with amplitude. Also, we show the programmability of the amplifier gain using the proposed tunable resistor.

A Compact One-Pin Mode Transition Circuit for Clock Synchronization in Current-Mode- Controlled Switching Regulators

This paper describes a one-pin mode transition circuit that addresses the issues related to clock synchronization in switching regulators during the mode transitions between external timing resistor and external clock. The proposed circuit reduces the circuit complexity needed to achieve mode transition during synchronization by utilizing switched-capacitor and sampling design techniques. It linearly converts the input clock frequency to a current to maintain constant amount of slope compensation for current-mode switching regulators across their switching frequency range of operation. This circuit is designed to operate from 100 KHz to 2.5 MHz and fabricated in a 0.35-μm BiCMOS-DMOS process. The total solution occupies 0.082 mm2 die area. Experimental results are presented from peak-current-mode buck regulators with one-pin synchronization circuit to show the performance improvement of using the proposed design approach over a phase-locked-loop-based design.

Multi-loop buck regulator for wide programmable switching frequency

This paper presents a multi-loop voltage-controlled buck converter that operates at a wide range of programmable switching frequency and works over an input voltage range of 3.5V to 60V and load current up to 3A. The output voltage can be externally set between 0.9V and 20V. A major challenge was incorporating line feed-forward technique while having a programmable switching frequency between 200 KHz and 2 MHz. A design technique to implement this feature, low-power mode detection using zero-cross detector, and multi-loop control to improve transient response will be presented. The converter fabricated in 0.5µm process consumes 60µA in low-power mode.