Eric Steegmans

ABACUS: a powerful tool in a mathematical sciences laboratory

This paper describes a highly interactive computer program, ABACUS, which exploits the potential of microcomputers in a mathematical sciences laboratory. In contrast to most educational software which demonstrates very specific points, ABACUS can be used for a variety of applications: it allows one to plot one or more functions on the same set of axes, to differentiate analytically, to compute a definite integral, to search the zeros of a function, and to solve systems of differential equations and to generate Taylor series expansions. Some applications demonstrate the usefulness of ABACUS.

Calculating Fast Fourier Transform by using parallel software design patterns

Multicore embedded systems introduce new opportunities and challenges. Scaling of computational power is one of the main reasons for a transition to a multicore environment. Parallel design patterns, such as Map Reduce, Task Graph, Thread Pool, Task Parallelism assist to derive a parallel approach for calculating the Fast Fourier Transform. By combining these design patterns, a robust application can be obtained. The key issues for concurrent calculation of a Fast Fourier Transform are determined at a higher level avoiding low-level patch-ups.

Evaluation of a dual-core SMP and AMP architecture based on an embedded case study

Typical telecom applications apply a planar architecture pattern based on the processing requirements of each subsystem. In a symmetric multiprocessing environment all applications share the same hardware resources. However, currently embedded hardware platforms are being designed with asymmetric multiprocessor architectures to improve separation and increase performance of noninterfering tasks. These asymmetric multiprocessor architectures allow different planes to be separated and assign dedicated hardware for each responsibility. While planes are logically separated, some hardware is still shared and creates cross-plane influence effects which will impact the performance of the system. The aim of this report is to evaluate, in an embedded environment, the performance of a typical symmetric multiprocessing architecture compared to its asymmetric multiprocessing variant, applied on a telecom application.