Erich Franz Haratsch

Equalization and FEC techniques for optical transceivers

In this tutorial paper, we present the application of well-known DSP techniques used in lower speed wireline and wireless applications, to high-speed optical communications. After an introduction on todays optical network architecture and typical optical channel impairments, we study techniques such as fiber equalization, maximum likelihood detection, and current and next generations Forward Error Correction (FEC), with special emphasis on VLSI implementation.

Digital signal processing in read channels

Digital signal processing (DSP) has been a key technology in read channels, contributing significantly to the dramatic storage capacity and data rate growth of hard disk drives. This tutorial paper provides an overview of magnetic recording trends, and it discusses the DSP algorithms and architectures that have been employed in read channels for equalization, detection and coding. This paper also presents both a read channel and a hard disk drive SoC chip in 0.16 /spl mu/m CMOS process.

VLSI Design of High-Rate Quasi-Cyclic LDPC Codes for Magnetic Recording Channel

By implementing an FPGA-based simulator, this paper investigates the semi-random construction of high-rate regular QC-LDPC codes with low error floor for the magnetic recording channel. Then a new QC-LDPC decoder hardware architecture is proposed. Finally, a read channel signal processing datapath consisting of a parallel Max-Log-MAP detector and the proposed QC-LDPC decoder is implemented in 0.13 mum CMOS. This design achieves a throughput up to 1.8Gbps under 16 iterations of LDPC decoding