Erno H. Klaassen

Process for in-plane and out-of-plane single-crystal-silicon thermal microactuators

Abstract A process to manufacture single-crystal thermal actuators using silicon fusion bonding and electrochemical etch stop is presented. The process permits the simultaneous creation of in-plane and out-of-plane thermal actuators together with levers suitable for both directions of actuation. A final dry-release step is used, permitting the manufacture of MOS or bipolar devices in conjunction with actuators. Out-of-plane actuation of vertically levered devices has been demonstrated. The −3 dB response frequency of out-of-plane actuators is approximately 1000 Hz in air. Novel levered in-plane devices which achieve deflections of up to 200 μm have been fabricated. An estimate of the upper bound of thermal actuator efficiency is presented.

Silicon fusion bonding and deep reactive ion etching: a new technology for microstructures

Abstract New developments in deep reactive ion etching (DRIE) technology, when combined with silicon fusion bonding (SFB), make it possible, for the first time, to span nearly the entire range of microstructure thicknesses between surface and bulk micromachining, using only single-crystal silicon. The combination of these two powerful micromachining tools forms a versatile new technology for the fabrication of micromechanical devices. The two techniques are described and a process technology is presented. Some of the experimental structures and devices that have been demonstrated using this new process technology are discussed.

Micromachined thermally isolated circuits

Abstract This paper details a post-processing technique by which circuitry in an unmodified IC technology is thermally and electrically isolated from the silicon substrate. This method enables new applications for micromachining, including temperature regulation of analog ICs, to be carried out. The process is discussed in detail, along with improved tetramethyl ammonium hydroxide (TMAH) etching chemistries that use strong oxidizers to eliminate hillock formation. Also presented is an electrochemical biasing method that uses circuitry on the silicon being etched during the micromachining step. Work is currently underway to evaluate the use of these micromachining techniques for commercial analog circuit applications, several of which are discussed.

Thermally and electrically isolated single crystal silicon structures in CMOS technology

Thermally and electrically isolated single crystal silicon structures have been fabricated using a post-processing anisotropic tetramethyl ammonium hydroxide (TMAH) electrochemical etch. The process was carried out on CMOS circuits fabricated by a commercial foundry. Since the etch consists of a single micromachining step performed on packaged and bonded dice, this technique has the potential for cost-effective prototyping and production of integrated sensors and circuits.<<ETX>>

Integrated thermal-conductivity vacuum sensor

Abstract A thermal-conductivity vacuum sensor with a novel on-chip control system is presented. The sensing structure is a small circuit suspended over a cavity etched in the (100)-oriented silicon substrate. An integrated control system maintains a constant temperature difference between this thermally isolated sensor and the substrate. The control loop allows for a digitally adjustable operating temperature of the sensor. The sensitive range of the prototype vacuum sensor extends from 0.8 Pa (6 mtorr) to approximately 9.2 × 104 Pa (690 torr). The system has been fabricated in a completely unmodified foundry CMOS process, provides a current output, dissipates only 5 mW of power, and occupies an area of approximately 0.3 mm2.

Fabrication of SOI wafers with buried cavities using silicon fusion bonding and electrochemical etchback

Abstract This paper describes a new technique for batch fabrication of silicon-on-insulator (SOI) wafers for microelectromechanical systems (MEMS) applications by silicon wafer bonding techniques. The process permits the inclusion of buried cavities in the SOI wafers, providing a useful tool for sensor and actuator fabrication using the resulting wafers. A low-cost electrochemical etchback step is used to define accurately the thickness of the remaining single-crystal material even though the two wafers are bonded with an intermediate insulating oxide layer. The results presented include guidelines for backside contact definition which maximize the useful silicon area as a function of doping level. The final single-crystal silicon thickness is uniform to within 0.05 μm (standard deviation) and does not require any costly high-accuracy polishing steps.

Diode-based thermal r.m.s. converter with on-chip circuitry fabricated using CMOS technology

Abstract A high-frequency root-mean-square (r.m.s.) converter composed of two matched thermal elements and on-chip circuitry has been fabricated in a foundry CMOS process with post-process micromachining techniques. An anisotropic undercut etch in conjunction with an electrochemical etch stop is used to form the thermal elements of the r.m.s. converter, which are suspended single-crystal silicon regions containing temperature-sensing diodes heated by polysilicon resistors. One of the elements is heated by the a.c. signal, while an integrated continuous-time feedback network maintains a second element at the same temperature. The converter has a packaging-limited — 3 dB bandwidth of 415 MHz, an r.m.s. dynamic range of 53 dB, nonlinearity of 1%, a quiescent power dissipation under 1 mW, and occupies an area of approximately 400 μm × 400 μm. The thermoelements have a thermal resistance of up to 37 000 K W −1 in air. In addition to the r.m.s. converter itself, an improved wet etchant chemistry is presented. Ammonium persulfate, when added to tetramethyl ammonium hydroxide (TMAH) silicon etchant, improves the silicon etch rate and the (100) surface quality. This etch chemistry should be useful for a broad range of CMOS-compatible micromachining applications.

A micromachined low-power temperature-regulated bandgap voltage reference

This paper describes a temperature regulated bandgap voltage reference fabricated in a foundry CMOS process. Using a simple post-processing micromachining step, a small portion of the chip containing the reference circuitry is thermally isolated from the rest of the silicon die. Having high thermal resistance and small thermal mass, the reference requires 200 times less power and warms up 160 times faster than previous heated-substrate circuits. The reference, in a standard CMOS process, can be included on-chip with CMOS data converters and mixed-signal products.

Fabrication Of SOI Wafers With Buried Cavities Using Silicon Fusion Bonding And Electrochemical Etchback

This paper describes a new technique for batch fabrication of Silicon On Insulator (SOI) wafers for MEMS applications by silicon wafer bonding techniques. The process permits the inclusion of buried cavities in the SOI wafers, providing a useful tool for sensor and actuator fabrication using the resulting wafers. A low cost electrochemical etchback step is used to accurately define the thickness of the remaining single crystal material even though the two wafers are bonded with an intemediate insulating oxide layer. The results presented include guidelines for backside contact definition which maximize the useful silicon area as a function of doping level. The final single crystal silicon thickness is uniform to within/spl plusmn/0.05/spl mu/m (std dev) and does not require a costly high accuracy polish step.

Diode-based Thermal Rms Converter With On-chip Circuitry Fabricated Using Standard CMOS Technology

A high frequency root-mean-square (RMS) converter composed of two matched themal elements and on-chip circuitry was fabricated using a foundry CMOS process and post-process micromachining techniques. The thermal elements are suspended single crystal silicon regions containing temperature sensing diodes heated by polysilicon resistors. One of the thermoelements is heated by the AC signal, while an integrated continous-time feedback network maintains a second element at the same temperature. The converter has a packaging-limited -3 dB bandwidth of 415 MHz, an RMS dynamic range of 53 dB, nonlinearity of 1%, a quiescent power dissipation under 1 mW, and occupies an area of approximately 400 /spl mu/m x 400 /spl mu/m. The thermoelements have a thermal resistance of up to 37,000 K/W.