Erwin Schmitt

SiC-bulk growth by physical-vapor transport and its global modelling

4H- and 6H-SiC bulk crystals have been prepared by physical vapor transport (PVT) both in resistively and inductively heated growth reactors. Epitaxial SiC layers were grown on the wafers by chemical vapor deposition. Structural and electrical material properties of the 1–1.4 inch boules and epitaxial layers were investigated by defect etching and optical microscopy, stress birefringence and Hall effect. Single crystalline material exhibits a low micropipe density MPD ≈ 70 cm−2 and stress level. Blocking characteristics of the epitaxial layers have been determined electrically revealing high breakdown fields of 1.8–1.9 MV/cm. Finally simulation results applying a process model of SiC PVT crystallization including heat and mass transfer and chemical reactions are presented.

Analysis on defect generation during the SiC bulk growth process

Abstract SiC crystals (1.2–1.5′′ diameter) were grown by the modified Lely technique on seeds with different micropipe densities in order to study the defect generation during seeding and subsequent bulk growth. The micropipe generation is found to be strongly correlated with the occurrence of second phases in SiC like carbon inclusion formation. Model approaches for stable SiC growth conditions, i.e. without inclusions, are discussed. Numerical modeling was performed to reveal the radial and axial temperature gradients of our crucible set-up. Stress formation and micropipe generation are determined to be enhanced in the presence of a large axial temperature gradient.

Micropipes and polytypism as a source of lateral inhomogeneities in SiC substrates

Abstract Structural and electrical inhomogeneities in SiC bulk crystals grown by the modified Lely sublimation method [1] in 〈0001〉 direction are investigated. Inclusions of different polytypes such as 15R in 6H material are observed on a macroscopic as well as a microscopic scale. Their size and number can be associated with the growth rate of the crystal. Beside the familiar micropipes, ‘nanopipes’ were observed by atomic force microscopy. Micropipes and nanopipes form centers of growth spirals related to the growth mechanism of the crystals under study. These micro- and nanopipes are a major source of structural and electrical inhomogeneities of SiC which are discussed in this paper.

Increase of SiC Substrate Resistance Induced by Annealing

We report here an anisotropic increase in SiC bulk resistivity by annealing at 1150 °C, and discuss the implications for SiC devices. The increase in resistivity is resistivity dependent and can be (at least) partially reversed by a subsequent anneal at higher temperature. Ideal device performance is achievable with appropriate annealing steps during device processing.

Quality Aspects for the Production of SiC Bulk Crystals

For several years the major focus of material issues in SiC substrates was laid on the reduction of macroscopic defects like polytype inclusions, low angle grain boundaries and micropipes. Since then significant improvements have been achieved and micropipe densities could be reduced to values below 1 cm-2. Nevertheless the fabrication of high quality substrates at high volume and low cost is still challenging. Therefore preconditions for reproducible process and quality control will be discussed. Since it is obvious that dislocations are the main reason for degradation in power devices the prevailing attention has also been shifted to that field of material research. Intense studies were utilized on dislocation and stacking fault formation during sublimation growth. For this reason we systematically varied crucial parameters of the crystal growth process and applied several specific characterization methods, e.g. KOH-defect-etching, electron microscopy and optical microscopy, to evaluate resulting material properties. The investigations were accompanied by failure analysis on devices of the Schottky-type. We found out that for the improvement of substrate quality emphasis has to be laid on the reduction of thermoelastic stress in the growing crystal. The results of numerical calculations enabled us to derive moderate growth conditions with reduced temperature gradients and correspondingly low defect concentration.

Growth and Characterization of 2″ 6H-Silicon Carbide

For the growth of 2″ 6H-SiC a sublimation growth process was developed. By different means of characterization crystal quality was evaluated. Higher defect densities, mainly in the periphery of the crystals were found to be correlated to unfavourable process conditions. Improvement of thermal boundary conditions lead to a decreased defect density and better homogeneity over the wafer area.

High Quality 100mm 4H-SiC Substrates with Low Resistivity

One of the most crucial defects for the device fabrication on silicon carbide (SiC) substrates are areas with low crystalline quality and micro-pipe clusters which can still occupy several percent of the area in commercial available 4H-substrates. These defects originate from the seed or are generated by modification changes during growth and can be easily detected under crossed polarizers. In this presentation the historic development at SiCrystal from Acheson material to wafers with 100mm diameter, state of the art micro-pipe density and excellent crystalline quality (FWHM < 20 arcsec) on whole area will be shown. Additionally the influence of carbon inclusions on surface quality and the present dislocation densities in 4H substrates will be discussed. While carbon inclusions were reduced to uncritical levels dislocation densities are still in the range of 104 cm-2. Therefore strategies for further reduction will be pointed out. Finally a resistivity limit (16 mΩcm) for stacking fault formation during annealing at 1150°C will be defined.

Investigations on Polytype Stability and Dislocation Formation in 4H-SiC Grown by PVT

We carried out investigations to elucidate the reasons for polytype changes in 4H. The aim was to sustain polytype stability throughout the entire process. The investigations were accompanied by studies on the formation of basal plane dislocations and their role as source for stacking faults. Several methods for the evaluation of material properties were applied to determine quality most precisely, e.g. KOH-defect-etching, optical microscopy, electron microscopy and X-ray-diffraction. We found out that several influences in growth conditions have to be controlled in a proper manner to achieve defect reduction. Based on these investigations we were able to improve our process and the crystal quality significantly. Best values for 3” 4H wafers show that EPD = 5x103 cm-2 , MPD < 0.1 cm-2 and FWHM-values < 15 arcsec can be achieved.