Esteban Tlelo-Cuautle

Pathological Element-Based Active Device Models and Their Application to Symbolic Analysis

This paper proposes new pathological element-based active device models which can be used in analysis tasks of linear(ized) analog circuits. Nullators and norators along with the voltage mirror-current mirror (VM-CM) pair (collectively known as pathological elements) are used to model the behavior of active devices in voltage-, current-, and mixed-mode, also considering parasitic elements. Since analog circuits are transformed to nullor-based equivalent circuits or VM-CM pairs or as a combination of both, standard nodal analysis can be used to formulate the admittance matrix. We present a formulation method in order to build the nodal admittance (NA) matrix of nullor-equivalent circuits, where the order of the matrix is given by the number of nodes minus the number of nullors. Since pathological elements are used to model the behavior of active devices, we introduce a more efficient formulation method in order to compute small-signal characteristics of pathological element-based equivalent circuits, where the order of the NA matrix is given by the number of nodes minus the number of pathological elements. Examples are discussed in order to illustrate the potential of the proposed pathological element-based active device models and the new formulation method in performing symbolic analysis of analog circuits. The improved formulation method is compared with traditional formulation methods, showing that the NA matrix is more compact and the generation of nonzero coefficients is reduced. As a consequence, the proposed formulation method is the most efficient one reported so far, since the CPU time and memory consumption is reduced when recursive determinant-expansion techniques are used to solve the NA matrix.

CHAOTIC COMMUNICATION SYSTEM USING CHUA'S OSCILLATORS REALIZED WITH CCII+s

This work shows the experimental implementation of a chaotic communication system based on two Chuas oscillators which are synchronized by Hamiltonian forms and observer approach. The chaotic communication scheme is realized by using the commercially available positive-type second generation current conveyor (CCII+), which is included into the AD844 device. As a result, experimental measurements are provided to demonstrate the suitability of the CCII+ to implement chaotic communication systems.

Frequency limitations in generating multi-scroll chaotic attractors using CFOAs

The current-feedback operational amplifier (CFOA) allows us to implement any kind of circuit useful in analogue signal processing applications. However, it has limited performance in implementing nonlinear circuits. That way, this investigation highlights the experimental results of implementing a multi-scroll chaotic oscillator by using the commercially available CFOA AD844. The chaotic oscillator is based on saturated nonlinear function (SNLF) series, and we show and discuss its frequency limitations to generate 3- to 10-scrolls from 1 kHz to 100 kHz. Finally, we conclude that the frequency limitations are due to the nonideal characteristics of the CFOA-based SNLF block, imposed by the AD844.

A survey on the integrated design of chaotic oscillators

We present a review on the electronic design of chaotic oscillators. Multi-scroll chaotic oscillators are listed according to their electronic implementations. A 3-scrolls oscillator is analyzed from its mathematical description, and designed with current-feedback operational amplifiers. Finally, we list the integrated realizations, and discuss key points for future research on the design of multi-scroll chaotic oscillators.

Multiscroll floating gate–based integrated chaotic oscillator

In this work, we proposed a voltage-to-current cell based on a Complementary metal-oxide-semiconductor (CMOS) inverter designed by using floating gate transistors. We demonstrate its usefulness for the design of stair-type and sawtooth functions to be used in the implementation of a multiscroll chaotic oscillator. The main advantage of using floating gate transistors to design the nonlinear functions is the elimination of external reference DC sources, as is typically done in most of the nonlinear functions that generate multiscroll attractors. The key guidelines for the design of our proposed voltage-to-current cell are given to provide good performances in the design of an integrated multiscroll chaotic oscillator. HSPICE simulations are presented to demonstrate the usefulness of the proposed cell to generate multiscroll attractors. Finally, simulation results before and after layout are presented to show the good agreement with respect to theoretical results. HSPICE simulations of the post-layout design are in accordance with the system behavior. Copyright

Binary Genetic Encoding for the Synthesis of Mixed-Mode Circuit Topologies

A binary genetic encoding (BGE) representation for the automatic synthesis of mixed-mode circuit topologies, is introduced. First, the genetic encoding of unity-gain cells (UGCs), such as voltage (VF) and current followers (CF), and voltage (VM) and current mirrors (CM), is presented. New BGEs for the VM and CM are introduced. Second, the UGC’s chromosomes are combined to synthesize mixed-mode circuit-topologies, namely current conveyors and current-feedback operational amplifiers (CFOA). Five strategies for the combination or superimposing of UGCs are introduced. The proposed BGE has been implemented in MATLABTM, and links SPICE to evaluate the populations with different integrated circuit technologies. Some new synthesized circuit topologies are shown along with their chromosome description.

Richardson extrapolation-based sensitivity analysis in the multi-objective optimization of analog circuits

The feasible solutions provided by a multi-objective evolutionary algorithm (MOEA) in the optimal sizing of analog integrated circuits (ICs) can be very sensitive to process variations. Therefore, to select the optimal sizes of metal-oxide-semiconductor field-effect-transistors (MOSFETs) but with low sensitivities, we propose to perform multi-parameter sensitivity analysis. However, since MOEAs generate feasible solutions without an explicit equation, then we show the application of Richardson extrapolation to approximate the partial derivatives associated to the sensitivities of the performances of an amplifier with respect to the sizes of every MOSFET. The proposed multi-parameter sensitivity analysis is verified through the optimization of a recycled folded cascode (RFC) operational transconductance amplifier (OTA). We show the behavior of the multi-parameter sensitivity approach versus generations. The final results show that the optimal sizes, selected after executing the sensitivity approach, guarantee the lowest sensitivities values while improving the performances of the RFC OTA.

Generalized admittance matrix models of OTRAs and COAs

This paper proposes new admittance matrix models to approach the behavior of fully-differential Operational Transresistance Amplifiers (OTRAs) and Current Operational Amplifiers (COAs). The infinity-variables method is used in order to derive the new generalized models. As a consequence, standard nodal analysis being improved to compute fully-symbolic small-signal characteristics of fully-differential analog circuits.

Evolutionary Electronics: Automatic Synthesis of Analog Circuits by GAs

Summary. This paper introduces guidelines for the automatic synthesis of analog circuits by performing evolutionary operations. It is shown that the synthesis of unity-gain cells (UGCs) can be done from nullor-based descriptions. In this manner, UGCs such as: the voltage follower (VF), current follower (CF), voltage mirror (VM), and current mirror (CM), are described using a new genetic representation consisting of ordered genes. Furthermore, a genetic algorithm (GA) is introduced in order to search for the best UGC by performing crossover and mutation operations, and by selecting UGCs by elitism. On the other hand, since GAs operate on the principle of survival of the fittest, the proposed GA has the capability to generate new design solutions, i.e. new UGCs. Additionally, the synthesized UGCs are evolved to design more complex circuits, namely: current conveyors (CCs), inverting CCs (ICCs), and current-feedback amplifiers (CFOAs). Finally, some analog circuit evolution approaches are described to synthesize practical applications such as: active filters, single-resistance controlled oscillators (SRCOs), and chaotic oscillators, which are implemented using UGCs, CCs, and CFOAs.

Synthesis of CCII-s by superimposing VFs and CFs through genetic operations

It is introduced a new genetic algorithm to synthesize the negative-type second generation current conveyor (CCII-) by superimposing a voltage follower (VF) with a current follower (CF). First, the VF and CF are described by binary genes. Second, the gene CF is inverted, rigth-shifted and multiplied (AND operation) with the gene VF to verify that both genes can be superimposed to synthesize the CCII-. Finally, some synthesized CCII-s are presented which electrical characteristics are measured using HSPICE and standard CMOS technology of 0.35μm.