Jose Cruz Nunez-Perez

Application of a Chaotic Oscillator in an Autonomous Mobile Robot

Abstract Terrain exploration robots can be of great usefulness in critical navigation circumstances. However, the challenge is how to guarantee a control for covering a full terrain area. That way, the application of a chaotic oscillator to control the wheels of an autonomous mobile robot, is introduced herein. Basically, we describe the realization of a random number generator (RNG) based on a double-scroll chaotic oscillator, which is used to guide the robot to cover a full terrain area. The resolution of the terrain exploration area is determined by both the number of bits provided by the RNG and the characteristics of step motors. Finally, the experimental results highlight the covered area by painting the trajectories that the robot explores.

Flexible test bed for the behavioural modelling of power amplifiers

Purpose – The paper aims to focus on the memory-polynomial model (MPM) as special case of Volterra series, implemented in hardware. The behavior of the MPM is fully proved through a comparison with AM-AM and AM-PM measured data. The results show that this simulation technique is able to prove the effectiveness of the MPM implementation as behavioural model for high power radiofrequency amplifiers. The system is able to compensate perturbations caused by modern communication systems. Design/methodology/approach – The implementation uses Matlab-Simulink, and its digital signal processing (DSP) builder. The first stage allows developing the model in Matlab using the DSP builder blockset through the signal compiler block. Then, the design is downloaded to the DSP board. Findings – The paper demonstrates a proper behavior of the MPM as a truncation of the Volterra series, with respect to different inputs. This is a key point, because the series truncations allow first to implement this model in real time and s...

Modeling memory effects in RF power amplifiers applied to a digital pre-distortion algorithm and emulated on a DSP-FPGA board

An emulation tool with the capability of modeling the nonlinearity order and memory effects for real power amplifiers (PAs) conversion curves, is introduced. The proposed tool comprises special cases of Volterra series as the Memory Polynomial Model and a learning technique like artificial neural networks. The proposed system is a novel integrated one able to model the real behavior of radio frequency (RF)-PAs under different memory models. The developed system starts from a test bed able to acquire AM-AM and AM-PM distortion curves measurements. This procedure can predict the behavior and improve the analysis using it as a design tool. Emulation tool for modeling the nonlinearity order and memory effects for real power amplifiers.It comprises Memory Polynomial Model and a learning technique like artificial neural networks.The new proposed tool reduces design time as well as realizing the implementation of a DPD.The overall performances have been properly verified by using AM as input signals.A novel technique by combining a GUI as control stage, Simulink and the DSP Builder tool.

Measurement of dynamic power dissipation and estimation of effective dynamic efficiencies in an LTE chireix PA

A testbed is reported for the measurement of the instantaneous power dissipation of a dual input Chireix power amplifier (PA) driven by an LTE signal. An FPGA system is used to dynamically control the phase difference and respective incident power level of the two signals injected at the dual-inputs of the Chireix PA under test. The dynamic drain currents of the power amplifier are measured using two Hall effect current probes placed inside and outside the PA biasing network. The synchronized acquisition of the biasing current, biasing voltage, and RF output power of the PA is then performed for 1 MHz and 10 MHz bandwidth LTE signals. As expected, the power spectra of the biasing currents exhibit twice the bandwidth of the LTE signals. After some signal processing and calibration, an estimation of the dynamic efficiency is obtained from the measured dynamic biasing current and RF output power. It is further verified that the insights obtained from the modeling of the dynamic power dissipation and its memory effects can assist with the optimization of the Chireix phase control required to maximize the average power efficiency of the Chireix PA.

FPGA-based test bed for measurement of AM/AM and AM/PM distortion and modeling memory effects in RF PAs

Using a field-programmable gate array (FPGA) development board, a digital signal processor (DSP) builder, and the phase-to-amplitude conversion principle, a low-cost system for measuring the amplitude-to-amplitude (AM/AM) and amplitude-to-phase (AM/PM) distortion curves of radio frequency (RF) power amplifiers (PAs) is presented. The state of the art based on the measurements and preliminary studies of AM/AM and AM/PM distortion curves is discussed. A full digital control of the test bed simulated/emulated in Matlab/Simulink is introduced to recalculate the known AM/AM and AM/PM measurements stored as look-up table (LUT). Finally, the low-cost system comprises the memory polynomial model (MPM) that involves the nonlinearity order and memory effects of real PAs. Low cost system for simulating/emulating/measuring AM/AM and AM/PM distortion curves in RF PAs.Comprises the Memory Polynomial Model that models the nonlinearity order and memory effects of real PAs.Measurements of AM/AM and AM/PM distortion curves by using an FPGA development board.Phase to amplitude conversion principle.Full digital control of the test bed simulated/emulated in Matlab-Simulink with DSP Builder.

Coefficients Estimation of MPM Through LSE, ORLS and SLS for RF-PA Modeling and DPD

This paper shows and compares three techniques based on the least squared error for the estimation of the constant coefficients of the memory polynomial model used for the modeling of power amplifiers for radio-frequency and for the construction of a pre-distorter. The first technique is the conventional linear regression using the least square error method. The second technique is the order recursive least squares which can be used for exploring the most adequate nonlinearity order and memory depth of the memory polynomial model by comparing subsequent errors. The sequential least squares method is useful when the measurements of a system are coming sample by sample and the parameters of the model should be adjusted on-line. The mathematical background of the three methods is shown; as an experimental validation of this methods they were simulated in Matlab for the measurements of a 10W NPX Power Amplifier based on the transistor CLF1G0060 GaN HEMTs. An NMSE of \(-19.83\) dB was reached for the best model. Also in order to linearize the power amplifier a pre-distorter was constructed through indirect learning architecture achieving a 50 dBm spurious free dynamic range and a 25 dBc reduction in the adjacent power ratio.

FPGA Realisation of n-QAM Digital Modulators

ABSTRACT This article introduces a novel modulators’ design approach by applying direct digital generation capabilities that improve the development, synthesis, and verification of wireless transmitter systems. In this manner, digital modulators’ that are able to process 8-, 16-, and 64-quadrature amplitude, are realised herein by using embedded systems like the well-known field-programmable gate array (FPGA). It is worth mentioning that using FPGAs allows us to perform a reduction of the hardware resources. This issue also allows relaxing the operating conditions of the systems in the digital domain. Several experiments are shown to demonstrate the usefulness of an FPGA, like using Stratix III DSP Development Kit, and to confirm the good agreement of the experimental results with theoretical ones.

Comparison of Two Methods for I/Q Imbalance Compensation Applied in RF Power Amplifiers

In this paper, the design and implementation of two methods for I/Q imbalance compensation is presented, based on a low cost phase measurement approach. The design methodology for an I/Q imbalance correction system is presented based on a DSP-FPGA board. The first method employs some trigonometric properties. The second employs Volterra series to model the non-linear behavior of the I/Q imbalance. The system performance is verified using a complex signal with phase and amplitude imbalance. The implemented systems have the advantage of having low implementation cost and a high design flexibility, which allows for future revisions or enhancement. The Stratix III FPGA board from Altera is employed for the practical implementation and results verification of the system. A comparison between methods is introduced for correcting (I or Q) branches respectively to guarantee amplitude and phase balancing condition in the modulator output. Experimental results are implemented employing an FPGA by using DSP-Builder to bit true VHDL hardware description of proposed model. This work can be considered as a low cost alternative for I/Q imbalance correction given that it does not require additional measurement equipment nor uses complex algorithms.

FPGA-Based Modeling and Design Methodology of a Digital Pre-distortion System for Power Amplifier Linearization

This paper presents the design methodology of a complete digital pre-distortion system that enables the power amplifier linearization. This system employs the memory polynomial model for its realization. The performance of the linearization is validated by using an LTE carrier signal in the band of 10 MHz. This integrated solution is capable of linearizing any real power amplifier from measurements of AM/AM and AM/PM conversion curves. Furthermore, this development test bed is able to predict the behavior and facilitates the design analysis of a pre-distorter. The experimental results are implemented employing a DSP-FPGA by using DSP Builder tool to obtain the VHDL hardware description. The proposed model shows a spurious-free dynamic range of 50 dBm and an adjacent channel power ratio reduction of 25 dBc for the NXP 10W power amplifier.

Behavioral Modeling for Power Amplifiers Comparing MPM, Wiener and Hammerstein with FPGA-Based Implementation

This paper aims on three different behavioral models with memory for radio frequency power amplifiers. These models are based on the principle of Volterra series, which were simulated in the Matlab-Simulink environment and implemented on a DSP-FPGA Altera Stratix III board. The MPM, Hammerstein and Wiener models were compared based on the distortion curves AM-AM and AM-PM of a RF-PA 10W through different levels of nonlinearity and memory depth. The results show the metric NMSE in the range of -30 dB for the three models of a NXP 10W GaN HEMT @ 3.0 GHz PA demonstrating its high accuracy during the FPGA implementation.