Eugene J. O'Sullivan

Electrolessly deposited diffusion barriers for microelectronics

Electrolessly deposited materials were investigated as possible diffusion barrier layers for multilayer microelectronic structures. Attention was focused on selective deposition of barrier layers on various surfaces, the barriers capability to inhibit Cu diffusion, changes in Cu resistivity caused by barrier material diffusion into Cu, and adhesion between a polyimide film and the barrier layer. Electroless Co(P) was the most effective barrier to Cu diffusion at elevated temperature, even at Co(P) thicknesses as low as 500 A. Diffusion-barrier effectiveness of electrolessly deposited materials decreased in the following order: Co(P) > Ni-Co(P) ≃ Ni(P) > pure metals Co, Ni). Although a polyimide film bonded strongly to electrolessly deposited Ni(P) layers and only weakly to as-deposited Co(P), electroless Ni(P) significantly increased the Cu resistivity through interdiffusion. Polyimide adhesion to Co(P) was improved by oxidizing a Co(P) surface immediately after deposition to grow a passive film 50-75 A thick, yielding a surface to which the polyimide adheres strongly and reproducibly. A low-energy-beam, scanning electron microscopy/energy-dispersive X-ray analysis technique (SEM/EDX) was developed to measure the nonoxidized thin Co(P) barrier layer thickness.

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

An integrated voltage regulator (IVR) is presented that uses custom fabricated thin-film magnetic power inductors. The inductors are fabricated on a silicon interposer and integrated with a multi-phase buck converter IC by 2.5D chip stacking. Several inductor design variations have been fabricated and tested. The best performance has been achieved with a set of eight coupled inductors that each occupies 0.245 mm2 and provides 12.5 nH with 270 mΩ DC. With early inductor prototypes, the IVR efficiency for a 1.8 V:1.0 V conversion ratio peaks at 71% with FEOL current density of 10.8 A/mm2 and inductor current density of 1.53 A/mm2. At maximum load current, 69% conversion efficiency and 1.8 V:1.2 V conversion ratio the FEOL current density reaches 22.6 A/mm2 and inductor current density reaches 3.21 A/mm2.

Racetrack memory cell array with integrated magnetic tunnel junction readout

In this paper, we report the first demonstration of CMOS-integrated racetrack memory. The devices measured are complete memory cells integrated into the back end of line of IBM 90 nm CMOS. We show good integration yield across 200 mm wafers. With magnetic field-assist, we demonstrate current-driven read and write operations on cells within a 256-cell CMOS-integrated array.

Demonstration of Ultralow Bit Error Rates for Spin-Torque Magnetic Random-Access Memory With Perpendicular Magnetic Anisotropy

Bit error rates below 10-11 are reported for a 4-kb magnetic random access memory chip, which utilizes spin transfer torque writing on magnetic tunnel junctions with perpendicular magnetic anisotropy. Tests were performed at wafer level, and error-free operation was achieved with 10 ns write pulses for all nondefective bits during a 66-h test. Yield in the 4-kb array was limited to 99% by the presence of defective cells. Test results for both a 4-kb array and individual devices are consistent and predict practically error-free operation at room temperature.

Electro‐Oxidation of Formaldehyde on Thermally Prepared RuO2 and Other Noble Metal Oxides

The electro-oxidation of formaldehyde has been investigated at thermally prepared noble metal oxides, especially RuO{sub 2}, in aqueous solution. Studies were carried out on thin layers of oxide supported on Ta or Ti, and on thin, Teflon-bonded oxide layers attached to a glassy carbon rotating disk-electrode. The catalytic activity of RuO{sub 2} for HCHO oxidation was considerably greater than that of IrO{sub 2} and Rh{sub 2}O{sub 3}. At RuO{sub 2} formaldehyde was observed to undergo oxidation to formate at potentials from ca 0.75-1.25 vs. reference hydrogen electrode (RHE), and to carbonate at higher potentials. The results suggest that HCHO (and HCOOH) oxidation is mediated by higher valent states of the oxide metals ions electrogenerated at the electrode surface. Values of 10{sup {minus} 3} cm s{sup {minus} 1} (geometric electrode area based) and 10{sup {minus} 6} cm s{sup {minus} 1}(real area based) were estimated for the heterogeneous rate constant for HCHO oxidation at RuO{sub 2}. The activity for HCHO oxidation is correlated with the catalytic activity of the oxides for the oxygen gas evolution reaction.

A statistical study of magnetic tunnel junctions for high-density spin torque transfer-MRAM (STT-MRAM)

We have demonstrated a robust magnetic tunnel junction (MTJ) with a resistance-area product RA=8 Omega-mum2 that simultaneously satisfies the statistical requirements of high tunneling magnetoresistance TMR > 15sigma(Rp), write threshold spread sigma(Vw)/<Vw> <7.1%, breakdown-to-write voltage margin over 0.5 V, read-induced disturbance rate below 10-9, and sufficient write endurance, and is free of unwanted write-induced magnetic reversal. The statistics suggest that a 64 Mb chip at the 90-nm node is feasible.

Laser‐Assisted Seeding for Electroless Plating on Polyimide Surfaces

Excimer laser pulses with wavelengths of 248 and 308 nm were used to selectively seed Pd on polyimide (PI) surfaces, making them suitable for electroless plating. This novel seeding process for insulating materials is accomplished with the sample immersed in the seeding solution, occurs only on the areas of the substrate that are illuminated (through the liquid) by the laser light, and does not require prior treatment of the surface. The seeding solution is transparent to the laser light and the metal deposition occurs as a consequence of the photoabsorption in the solid. This leads to electron transfer from the solid film into the solution and reduction of the Pd ions in contact with the surface. The Pd content of the seeded samples increased with the number of pulses, but was independent of repetition rate. The deposition rate of Pd did not exhibit a significant dependence on wavelength, in agreement with UV absorption spectra of PI and a single photon absorption process for electron excitation to allowed unoccupied states. As for the PD distribution, the deposits consisted of islands with distributions that depended on surface properties as well as on laser-material interactions. Sufficient PD seeds for uniform electroless plating of Cu and Co were attained after 3000 pulses at fluences ≃30 mJ/cm 2 . Although these fluences are much lower than those used for ablation of PI under water, distinct kinds of surface roughness were observed depending on the laser light and on the different types of PI

Switching distributions and write reliability of perpendicular spin torque MRAM

We report data from 4-kbit spin torque MRAM arrays using tunnel junctions (TJs) with magnetization perpendicular to the wafer plane. We show for the first time the switching distribution of perpendicular spin torque junctions. The percentage switching voltage width, σ(Vc)/&#60;Vc> = 4.4%, is sufficient to yield a 64 Mb chip. Furthermore we report switching probability curves down to error probabilities of 5×10−9 per pulse which do not show the anomalous switching seen in previous studies of in-plane magnetized bits.

Two-level BEOL processing for rapid iteration in MRAM development

The implementation of magnetic random access memory (MRAM) hinges on complex magnetic film stacks and several critical steps in back-end-of-line (BEOL) processing. Although intended for use in conjunction with silicon CMOS front-end device drivers, MRAM performance is not limited by CMOS technology. We report here on a novel test site design and an associated thin-film process integration scheme which permit relatively inexpensive, rapid characterization of the critical elements in MRAM device fabrication. The test site design incorporates circuitry consistent with the use of a large-area planar base electrode to enable a processing scheme with only two photomask levels. The thin-film process integration scheme is a modification of standard BEOL processing to accommodate temperature-sensitive magnetic tunnel junctions (MTJs) and poor-shear-strength magnetic film interfaces. Completed test site wafers are testable with high-speed probing techniques, permitting characterization of large numbers of MTJs for statistically significant analyses. The approach described in this paper provides an inexpensive means for rapidly iterating on MRAM development alternatives to converage on an implementation suitable for a production environment.

A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm 2

Energy consumption is a dominant constraint on the performance of modern microprocessors and systems-on-chip. Dynamic voltage and frequency scaling (DVFS) is a promising technique for performing “on-the-fly” energy-performance optimization in the presence of workload variability. Effective implementation of DVFS requires voltage regulators that can provide many independent power supplies and can transition power supply levels on nanosecond timescales, which is not possible with modern board-level voltage regulator modules (VRMs) [1]. Switched-inductor integrated voltage regulators (IVRs) can enable effective implementation of DVFS, eliminating the need for separate VRMs and reducing power distribution network (PDN) impedance requirements by performing dc-dc conversion close to the load while supporting high peak current densities [2–3]. The primary obstacle facing development of IVRs is integration of suitable power inductors. This work presents an early prototype switched-inductor IVR using 2.5D chip stacking for inductor integration.