Michael C. Gaidis

Spin torque switching of perpendicular Ta∣CoFeB∣MgO-based magnetic tunnel junctions

Spin torque switching is investigated in perpendicular magnetic tunnel junctions using Ta∣CoFeB∣MgO free layers and a synthetic antiferromagnet reference layer. We show that the Ta∣CoFeB interface makes a key contribution to the perpendicular anisotropy. The quasistatic phase diagram for switching under applied field and voltage is reported. Low switching voltages, Vc 50 ns=290 mV are obtained, in the range required for spin torque magnetic random access memory. Switching down to 1 ns is reported, with a rise in switching speed from increased overdrive that is eight times greater than for comparable in-plane devices, consistent with expectations from a single-domain model.

Spin torque switching of 20 nm magnetic tunnel junctions with perpendicular anisotropy

Spin-transfer torque magnetic random access memory (STT-MRAM) is one of the most promising emerging non-volatile memory technologies. MRAM has so far been demonstrated with a unique combination of density, speed, and non-volatility in a single chip, however, without the capability to replace any single mainstream memory. In this paper, we demonstrate the basic physics of spin torque switching in 20 nm diameter magnetic tunnel junctions with perpendicular magnetic anisotropy materials. This deep scaling capability clearly indicates the STT MRAM device itself may be suitable for integration at much higher densities than previously proven.

Racetrack memory cell array with integrated magnetic tunnel junction readout

In this paper, we report the first demonstration of CMOS-integrated racetrack memory. The devices measured are complete memory cells integrated into the back end of line of IBM 90 nm CMOS. We show good integration yield across 200 mm wafers. With magnetic field-assist, we demonstrate current-driven read and write operations on cells within a 256-cell CMOS-integrated array.

Demonstration of Ultralow Bit Error Rates for Spin-Torque Magnetic Random-Access Memory With Perpendicular Magnetic Anisotropy

Bit error rates below 10-11 are reported for a 4-kb magnetic random access memory chip, which utilizes spin transfer torque writing on magnetic tunnel junctions with perpendicular magnetic anisotropy. Tests were performed at wafer level, and error-free operation was achieved with 10 ns write pulses for all nondefective bits during a 66-h test. Yield in the 4-kb array was limited to 99% by the presence of defective cells. Test results for both a 4-kb array and individual devices are consistent and predict practically error-free operation at room temperature.

A statistical study of magnetic tunnel junctions for high-density spin torque transfer-MRAM (STT-MRAM)

We have demonstrated a robust magnetic tunnel junction (MTJ) with a resistance-area product RA=8 Omega-mum2 that simultaneously satisfies the statistical requirements of high tunneling magnetoresistance TMR > 15sigma(Rp), write threshold spread sigma(Vw)/<Vw> <7.1%, breakdown-to-write voltage margin over 0.5 V, read-induced disturbance rate below 10-9, and sufficient write endurance, and is free of unwanted write-induced magnetic reversal. The statistics suggest that a 64 Mb chip at the 90-nm node is feasible.

High-bias backhopping in nanosecond time-domain spin-torque switches of MgO-based magnetic tunnel junctions

For CoFeB∕MgO-based magnetic tunnel junctions, the switching probability has an unusual dependence on bias voltage V and bias magnetic field H for bias voltage pulse durations t long enough to allow thermally activated reversal. At high junction bias close to 1V, the probability of magnetic switching in spin-torque-driven switches sometimes appears to decrease. This is shown to be due to a backhopping behavior occurring at high bias, and it is asymmetric in bias voltage, being more pronounced in the bias direction for antiparallel-to-parallel spin-torque switch, i.e., in the direction of electrons tunneling into the free layer. This asymmetry hints at processes involving hot electrons within the free-layer nanomagnet.

Switching distributions and write reliability of perpendicular spin torque MRAM

We report data from 4-kbit spin torque MRAM arrays using tunnel junctions (TJs) with magnetization perpendicular to the wafer plane. We show for the first time the switching distribution of perpendicular spin torque junctions. The percentage switching voltage width, σ(Vc)/&#60;Vc> = 4.4%, is sufficient to yield a 64 Mb chip. Furthermore we report switching probability curves down to error probabilities of 5×10−9 per pulse which do not show the anomalous switching seen in previous studies of in-plane magnetized bits.

Two-level BEOL processing for rapid iteration in MRAM development

The implementation of magnetic random access memory (MRAM) hinges on complex magnetic film stacks and several critical steps in back-end-of-line (BEOL) processing. Although intended for use in conjunction with silicon CMOS front-end device drivers, MRAM performance is not limited by CMOS technology. We report here on a novel test site design and an associated thin-film process integration scheme which permit relatively inexpensive, rapid characterization of the critical elements in MRAM device fabrication. The test site design incorporates circuitry consistent with the use of a large-area planar base electrode to enable a processing scheme with only two photomask levels. The thin-film process integration scheme is a modification of standard BEOL processing to accommodate temperature-sensitive magnetic tunnel junctions (MTJs) and poor-shear-strength magnetic film interfaces. Completed test site wafers are testable with high-speed probing techniques, permitting characterization of large numbers of MTJs for statistically significant analyses. The approach described in this paper provides an inexpensive means for rapidly iterating on MRAM development alternatives to converage on an implementation suitable for a production environment.

Size dependence of spin-torque induced magnetic switching in CoFeB-based perpendicular magnetization tunnel junctions (invited)

CoFeB-based magnetic tunnel junctions with perpendicular magnetic anisotropy are used as a model system for studies of size dependence in spin-torque–induced magnetic switching. For integrated solid-state memory applications, it is important to understand the magnetic and electrical characteristics of these magnetic tunnel junctions as they scale with tunnel junction size. Size-dependent magnetic anisotropy energy, switching voltage, apparent damping, and anisotropy field are systematically compared for devices with different materials and fabrication treatments. Results reveal the presence of sub-volume thermal fluctuation and reversal, with a characteristic length-scale of the order of approximately 40 nm, depending on the strength of the perpendicular magnetic anisotropy and exchange stiffness. To have the best spin-torque switching efficiency and best stability against thermal activation, it is desirable to optimize the perpendicular anisotropy strength with the junction size for intended use. It also...

Materials and devices for reduced switching field toggle magnetic random access memory

Toggle magnetic random access memory (MRAM) has been proposed to solve the problems of small switching margins and half-select activated errors found in Stoner-Wohlfarth MRAM. However, it is widely acknowledged that the switching fields required for toggle MRAM are substantially larger than those needed for Stoner-Wohlfarth MRAM. Previously published reports on toggle switching use large toggle start fields around 75Oe. Here we examine, both experimentally and with a single-domain model, how both the toggle start and end fields vary with free layer intrinsic anisotropy, thickness, width, aspect ratio, and interlayer exchange coupling. By optimizing these parameters, we obtain 400nm width devices with toggle start fields below 30Oe.