Eun-A Choi

Low computational complexity algorithms of LDPC decoder for DVB-s2 systems

This paper proposed the two kinds of simplified complexity reduced algorithm for LDPC decoder. First, sequential decoding with partial group is proposed. It has same H/W complexity, and fewer number of iterations are required without performance degradation. Secondly, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. In this way, early detected edges are not computed following iterations, the computational complexity of further processing is reduced.

The effect of noise estimation error in the LDPC decoding performance

The number of quantization bits of the input signals rn needs to be optimally determined through the trade-off between the H/W complexity and the BER performance in LDPC codes applications. Also, an effective means to incorporate a channel reliability Lc in the log-MAP based LDPC decoding is highly required, because it has a major effect on both the complexity and performance. In this paper so as to effectively incorporate Lc in LDPC decoding. The optimal number of quantization bits of rn is investigated through Monte-Carlo simulations assuming that bit-shifting approach is adopted. In addition, the effects of an incorrect estimation of noise variance on the performance of LDPC codes are investigated. There is a confined range in which the effects of an in correct estimation can be ignored

Optimal Structure of Decoder Design for Low Density Parity Check Codes

The number of quantization bits of the input signal s needs to be optimally determined through the trade-off between the H/W complexity and the BER performance in LDPC codes applications. Also, an effective means to inc orporate a channel reliability in the Log- MAP based LDPC decoding is highly required, because it has a major effect on both the complexity and performance. In this paper so as to effectively incorporate in LDPC decoding. The optimal number of quantization bits of is investigated through Monte-Carlo simulations assuming that bit-shifting approach is adopted. In addition, the effects of an incorrect estimation of noise variance on the perfo rmance of LDPC codes is investigated. There is a confined range in which the effects of a n in correct estimation can be ignored.

Design and implementation of the 155 Mbps adaptive modem for broadband satellite communications

We present the design and implementation of a 155 Mbps satellite modem adaptively compensated against rain attenuation. In order to compensate rain attenuation over a high-speed satellite link, adaptive coding schemes with variable coding rates and pragmatic TCM, that can decode both QPSK and TC-8PSK using the same Viterbi decoder, are studied and analyzed. The pragmatic TCM with rate 2/3, selected as the optimal parameters for implementation, is modeled by VHDL. The key design issues are how to achieve a high data rate and how to integrate into a single ASIC chip various functions such as different data rates, scrambler/descrambler, interleaver, encoder/decoder, and BPSK/QPSK/8PSK modulator/demodulator. The implemented 155 Mbps adaptive modem has simplified interface circuits among the many functional blocks, and parallel processing architecture to achieve the high data rate. This 155 Mbps adaptive modem was designed and implemented by a single ASIC chip with the 0.25 /spl mu/m CMOS standard cell technology.