F. Fox

Improvements in electron microscopy by application of superconductivity

Resolution tests on amorphous carbon foils were carried out in an electron microscope with a superconducting system containing 4 lenses including a shielding lens at 200 kV beam voltage. Due to the mechanical and electrical stability of the system and the absence of contamination of the specimen the highest space frequencies transferred at vertically incident beam were 6 nm-1 corresponding to a resolution of 0.17 nm, a value which approaches the theoretical resolving power of the electron optical system. It should also be feasible to apply such a lens system for microprobe analysis without strongly reducing the theoretical resolution limit, if the construction of the shielding lens is slightly changed.

Radiation damage due to knock-on processes on carbon foils cooled to liquid helium temperature

Radiation damage on a holey carbon foil was investigated in an electron microscope with a superconducting lens system, where the temperature of the specimen and its environment initially was 4 K. Due to an electron dose of 2 X 10(4) As/cm2 the diameter of a hole increased 5 nm. Rough calculations show that this increase can be ascribed to knock-on processes. Estimates of the rise in specimen temperature during the irradiation are given.

Chip verification of 4 Mbit DRAMs by e-beam testing

Abstract Due to their high level of integration, dynamic random access memories (DRAMs) place vigorous requirements on the tools needed for internal signal analysis. In this regard, electron-beam testing proves an invaluable analysis tool for design and process optimization. The e-beam tester described here enables testing of a 4 Mbit DRAM, as well as of the future generation which will utilize submicron interconnections. Major development effort has been carried out with respect to the electron optics to fulfill the required e-beam tester performance. Other important verification criteria include the associated test hardware and degree of CAD integration, as well as improved circuit layout for e-beam testability at chip level. Typical 4 Mbit DRAM verification procedures will be outlined: basic logic verification, graphical comparison of simulated and measured signals by CAD integration and precision waveform measurements being the main topics. Finally, future demands will be discussed.

Frequency tracing and mapping in theory and practice

Abstract Two new electron-beam testing methods — frequency tracing and mapping — have been developed, which permit the visualization of integrated-circuit interconnections carrying signals of given frequencies as well as the determination of unknown frequencies. By employing the heterodyne principle, a very high (500 MHz) upper limit of the signal-frequency range is attained. A pulsed electron beam generated by a beam-blanking system is used as measuring probe. The blanking frequency is displayed with respect to the sought-for signal frequency thus producing a low fixed intermediate frequency. The filtered and demodulated signals then controls the brightness of a CRT. So an image of the interconnection network carrying the sought-for frequency is obtained. By sweeping the blanking frequency a spectral analysis can be additionally effected and unknown frequencies can be measured. Due to a capacitive coupling effect, interconnections which are covered by isolating layers are easily visualized. Since these methods require no synchronization of the blanking frequency and the clock frequency of the IC, they are especially well suited for investigation of asynchronous circuits.

Logic-state tracing: electron beam testing by correlation

Abstract Failure analysis and chip verification often necessitate tracing the path of a specific signal within an integrated circuit. The novel logic-state tracing method presented permits the visualization of only those interconnections carrying the sought-for signal. Logic-state tracing uses a continuous electron beam as a measuring probe which scans the surface of the circuit. The signal within the circuit modulates the secondary electron current and the sought-for signal is extracted from this current by means of a correlation technique. Due to a capacitative coupling effect, interconnections which are covered by isolating layers are easily visualized. The effectiveness of this new method is illustrated on the basis of two examples, a microprocessor 8085 and a 256K-DRAM.

A high frequency logic-state tracing method

Abstract The application of conventional logic-state tracing, with which all interconnections of an integrated circuit carrying a given sought-for bit pattern can be made visible, is confined to the investigation of signals with frequencies not exceeding the limit frequency of the scanning electron microscopes signal chain (3 to 5 MHz). This deficiency led to the development of a new method which extends the application range of logic-state tracing to signals with substantially higher frequencies. The new technique is based on a correlation process in which the electron beam itself performs the correlation with the aid of the voltage contrast mechanism. When using this method, the upper limit frequency is determined exclusively by the limit frequency of the beam-blanking system (approx. 250 MHz).

Electron-beam testing for chip verification of 16-Mbit DRAMs

Abstract Comparison of design and technology data of the 16-Mbit DRAM with that of circuits from the previous generation shows that the former have not become more critical for electron-beam testing. The performance of the submicron electron-beam tester developed for the 4-Mbit generation is also sufficient for the present generation. The main difficulty for the latter is caused by the use of two metallization layers. There is no longer any direct access to most internal signals, even for design verification. To obtain the same observability as in modules with one metallization layer, Alu 2 test pads were consistently used. The advantages of this layout for testability are compared with those of other approaches. Examples and results of such test pads are presented. After manufacture, measuring sites can be made accessible by local preparation using a focused ion beam (FIB). However, this method is expensive and time-consuming. Various examples of this approach and the quality of the results obtained by it are discussed. When using the layout for testability and local preparation, design verification is also possible in two-layer metallization without restrictions.

Reduction of Radiation Damage by Imaging with a Superconducting Lens System

Radiation damage is enemy number one for electron microscopical investigations of organic specimens at high resolution. Many different methods have been developed to obtain more information with a resolution better than 1 nm in spite of this handicap. In this paper we restrict ourselves to the application of low specimen-temperatures for fighting beam damage.

Schaltungsüberprüfung eines 4 Mb DRAM mit einem Submikron-Elektronenstrahl-Meßgerät

ÜbersichtDie Elektronenoptik der Niederspannungssäule eines Submikron-Elektronenstrahl-Meßgerätes (Sub-μm-EMG) wird beschrieben. Der Durchmesser des Elektronenstrahls erreicht für eine Strahlspannung von 1 kV und einen Probenstrom von 2,5 nA einen Wert von nur 0,12 μm. Das bei internen Signalverlaufsmessungen auftretende Übersprechen durch benachbarte Leitbahnen (‘crosstalk’-Fehler) konnte für 1,1 μm breite Bahnen auf etwa 3% begrenzt werden. Für den Nachweis des Lesesignals eines 4 Mb DRAM (‘Dynamic random access memory’, d. h. dynamischer Speicher mit wahlfreiem Zugriff) ist die Spannungsauflösung des Meßsystems ausreichend. Damit kann das Sub-μm-EMG zur internen Schaltungsüberprüfung des 4 Mb DRAM eingesetzt werden, wie an ausgewählten Beispielen illustriert wird. Die insgesamt ermittelten Leistungsdaten werden aber auch der zukünftigen Speichergeneration — dem 16 Mb DRAM — gerecht. Einige noch notwendige Verbesserungen für eine insgesamt erfolgreiche Schaltungsanalyse an Sub-μm-Schaltkreisen werden kurz diskutiert.ContentsThe electron-optical low-voltage column of the submicron electron-beam tester will be described. An electron probe diameter of 0.12 μm at a probe current of 2.5 nA as well as a beam voltage of 1 kV has been realized. It is shown that in the case of waveform measurements on 1.1 μm interconnection lines, the crosstalk error is only approximately 3%. The voltage resolution is sufficient to allow the sense signal of a 4 Mb DRAM (dynamic random access memory) to be verified. Typical examples demonstrate the benefits and flexibility of the contactless e-beam probing due to the allover verification requirements of the 4 Mb DRAM. Besides this the measured performance data enable the circuit analysis of the next DRAM-generation, the 16 Mb DRAM. The improvements still necessary for such future applications are briefly discussed.