J. Kölzer

Thermal imaging and measurement techniques for electronic materials and devices

Abstract The temperature stress occurring during electrical operation plays an important part in optimizing the performance and reliability of electronic devices. Thermal stress results from short transient processes (that can lead to critical junction temperatures within the chip) as well as from long-term cyclic stresses in a real system environment. The thermal characterization of materials, electronic components and modules by experiment represents an important contribution to quantifying and minimizing temperature stresses within the scope of a comprehensive approach to thermal management. This overview article describes the principles, characteristics and applications of (noncontacting) optical techniques that measure the absolute or relative temperatures of electronic devices or detect the thermal properties of materials. The range of techniques extends from conventional thermography (thermal imaging) via scanning laser probing (beam reflection and deflection techniques) up to near-field thermal microscopy. The presentation focuses on passive techniques that investigate the device under test in electrical operation (self-heating), but also take a look at photothermal methods that heat the specimen with a laser beam and analyze the thermal response (active techniques).

Chip verification of 4 Mbit DRAMs by e-beam testing

Abstract Due to their high level of integration, dynamic random access memories (DRAMs) place vigorous requirements on the tools needed for internal signal analysis. In this regard, electron-beam testing proves an invaluable analysis tool for design and process optimization. The e-beam tester described here enables testing of a 4 Mbit DRAM, as well as of the future generation which will utilize submicron interconnections. Major development effort has been carried out with respect to the electron optics to fulfill the required e-beam tester performance. Other important verification criteria include the associated test hardware and degree of CAD integration, as well as improved circuit layout for e-beam testability at chip level. Typical 4 Mbit DRAM verification procedures will be outlined: basic logic verification, graphical comparison of simulated and measured signals by CAD integration and precision waveform measurements being the main topics. Finally, future demands will be discussed.

Zeitaufgelöste Transillumination von trüben Medien

Die nichtinvasive Diagnostik von Gewebserkrankungen mit Licht ist von grosem Interesse fur die Untersuchung von Organen, fur Vorsorge- bzw. Verlaufskontrollen [1,2]. Wegen der enormen Vielfachstreuung des Lichtes im Gewebe ist dabei die raumliche Auflosung beschrankt. Es ist jedoch moglich, durch eine Laufzeitbeschrankung vielfach gestreute Photonen, welche eine schlechte Ortsauflosung bewirken, von weniger gestreuten Photonen mit einer besseren Ortsauflosung abzutrennen. Deshalb lassen sich durch den Einsatz zeitauflosender Verfahren generell mehr Strukturdetails erkennen als mit Dauerlichtverfahren. Um quantitativ abzuklaren, welchen Nutzen ein zeitaufgelostes Durchstrahlungsverfahren bietet, wurden systematische Messungen an unterschiedlichen Phantomen (trube Medien mit eingelagerten Storobjekten) durchgefuhrt. Die reduzierte Streulange l’ s = l s/ (1- g) ist auser von der Gewebeart abhangig von der verwendeten optischen Wellenlange; typische Werte liegen zwischen l’ s =0.4 mm... 8 mm. Die im Gewebe stattfindende Absorption (Absorptionslange l A) liegt in einem Wertebereich zwischen l A =100... 1000 mm. Experimente an truben Medien mit diesen optischen Weglangen decken alle denkbaren Anwendungen ab.

Determination of the lateral resolution of electron-beam testers and quantification of measurement errors

Abstract The technique of applying a linescan to a sharp structural edge in order to determine the lateral resolution of an e-beam tester was performed on the aluminum lines of an appropriate test chip. However, as aluminum interconnection lines do not present an optimal structure for this purpose, measurements were also taken on gold-plated interconnection lines, a silicon wafer edge and a platinum diaphrag9m, and the attainable accuracy was compared. Recommendations for a measuring technique could be derived from these results. The local field effect can have a significantly adverse influence on the accuracy achievable in waveform measurements, even if the primary beam is adequately focused. A suitable measuring specification would help to quantify the measurement errors.

Schaltungsüberprüfung eines 4 Mb DRAM mit einem Submikron-Elektronenstrahl-Meßgerät

ÜbersichtDie Elektronenoptik der Niederspannungssäule eines Submikron-Elektronenstrahl-Meßgerätes (Sub-μm-EMG) wird beschrieben. Der Durchmesser des Elektronenstrahls erreicht für eine Strahlspannung von 1 kV und einen Probenstrom von 2,5 nA einen Wert von nur 0,12 μm. Das bei internen Signalverlaufsmessungen auftretende Übersprechen durch benachbarte Leitbahnen (‘crosstalk’-Fehler) konnte für 1,1 μm breite Bahnen auf etwa 3% begrenzt werden. Für den Nachweis des Lesesignals eines 4 Mb DRAM (‘Dynamic random access memory’, d. h. dynamischer Speicher mit wahlfreiem Zugriff) ist die Spannungsauflösung des Meßsystems ausreichend. Damit kann das Sub-μm-EMG zur internen Schaltungsüberprüfung des 4 Mb DRAM eingesetzt werden, wie an ausgewählten Beispielen illustriert wird. Die insgesamt ermittelten Leistungsdaten werden aber auch der zukünftigen Speichergeneration — dem 16 Mb DRAM — gerecht. Einige noch notwendige Verbesserungen für eine insgesamt erfolgreiche Schaltungsanalyse an Sub-μm-Schaltkreisen werden kurz diskutiert.ContentsThe electron-optical low-voltage column of the submicron electron-beam tester will be described. An electron probe diameter of 0.12 μm at a probe current of 2.5 nA as well as a beam voltage of 1 kV has been realized. It is shown that in the case of waveform measurements on 1.1 μm interconnection lines, the crosstalk error is only approximately 3%. The voltage resolution is sufficient to allow the sense signal of a 4 Mb DRAM (dynamic random access memory) to be verified. Typical examples demonstrate the benefits and flexibility of the contactless e-beam probing due to the allover verification requirements of the 4 Mb DRAM. Besides this the measured performance data enable the circuit analysis of the next DRAM-generation, the 16 Mb DRAM. The improvements still necessary for such future applications are briefly discussed.

Analysis strategy for internal measurements on VLSI devices

Abstract In the VLSI product development, design as well as process related failures may be regarded as the cause for systematic malfunctions on the chip, concealing additional statistical defects and weaknesses. In an extreme case — as will be reported here — the storage function of a DRAM was crippled by serious faults in the peripheral logic. Consequently no experience was gained with respect to the storage cell area, in which the highest level of integration is achieved. This has very severe consequences for the learning curve, which normally must be very steep due to enormous market pressure. Considering the extreme complexity of todays integrated circuits (submicron regime) this steep condition is however hard to maintain. The present paper outlines an analysis strategy of how these difficulties can be overcome if the conditions are favorable, and thus stay on the learning curve.