F. Lorut

Deep sub micrometer imaging of defects in copper pillars by X-ray tomography in a SEM

The potential of X-ray nanotomography hosted in a SEM in presented in this paper. In order to improve the detail detectability of this system, which is directly related to the X-ray source size, thin metal layers have been studied and installed in the equipment. A 3D resolution pattern has been created in order to determine the smallest detectable features by this setup. This sample is a 25 μm diameter copper pillar in which size-controlled holes have been milled using a plasma-focused ion beam. This pattern has then been scanned and the resulting 3D reconstruction demonstrates that the instrument is able to detect 500 nm diameter voids in a copper interconnection, as used in 3D integration.

Reduction of the scanning time by total variation minimization reconstruction for X-ray tomography in a SEM.

Total variation minimization is applied to the particular case of X‐ray tomography in a scanning electron microscope. To prove the efficiency of this reconstruction method, noise‐free and noisy data based on the Shepp & Logan phantom have been simulated. These simulations confirm that Total variation minimization‐reconstruction algorithm better manages data containing low number of projections with respect to simultaneous iterative reconstruction technique or filtered backprojection, even in the presence of noise. The algorithm has been applied to real data sets, with a low angular sampling and a high level of noise. Two samples containing micro‐interconnections have been analyzed and 3D reconstructions show that Total variation minimization‐based algorithm performs well even with 60 projections in order to properly recover a 500 nm diameter void inside a copper interconnection.

X-ray μ-Laue diffraction analysis of Cu through-silicon vias: A two-dimensional and three-dimensional study

Here, white X-ray μ-beam Laue diffraction is developed and applied to investigate elastic strain distributions in three-dimensional (3D) materials, more specifically, for the study of strain in Cu 10 μm diameter–80 μm deep through-silicon vias (TSVs). Two different approaches have been applied: (i) two-dimensional μ-Laue scanning and (ii) μ-beam Laue tomography. 2D μ-Laue scans provided the maps of the deviatoric strain tensor integrated along the via length over an array of TSVs in a 100 μm thick sample prepared by Focused Ion Beam. The μ-beam Laue tomography analysis enabled to obtain the 3D grain and elemental distribution of both Cu and Si. The position, size (about 3 μm), shape, and orientation of Cu grains were obtained. Radial profiles of the equivalent deviatoric strain around the TSVs have been derived through both approaches. The results from both methods are compared and discussed.

Three-dimensional semiconductor device investigation using focused ion beam and scanning electron microscopy imaging (FIB/SEM tomography).

Three-dimensional focused ion beam/scanning electron microscopy (FIB/SEM tomography) is currently an important technique to characterize in 3D a complex semiconductor device or a specific failure. However, the industrial context demands low turnaround time making the technique less useful. To make it more attractive, the following study focuses on a specific methodology going from sample preparation to the final volume reconstruction to reduce the global time analysis while keeping reliable results. The FIB/SEM parameters available will be first analyzed to acquire a relevant dataset in a reasonable time (few hours). Then, a new alignment strategy based on specific alignment marks [using tetraethoxylisane (TEOS) and Pt deposition] is proposed to improve the volume reconstruction speed. These points combined represent a considerable improvement regarding the reliability of the results and the time consumption (gain of factor 3). This method is then applied to various case studies illustrating the benefits of the FIB/SEM tomography technique such as the precise identification of the origin of 3D defects, or the capability to perform a virtual top-down deprocessing on soft material not possible by any mechanical solution.

Boron atomic-scale mapping in advanced microelectronics by atom probe tomography

Two types of industrial transistor technologies have been studied using atom probe tomography (APT). Both 14 nm node high-K metal-oxide-semiconductor field effect transistors (MOSFETs) on ultrathin body and buried oxide and 320 GHz Ft Si/SiGe Heterojunction Bipolar Transistors (HBT) embedded in a 55-nm BiCMOS chip have been analysed and their atomic distribution has been mapped. Due to the limitations of routine characterisation techniques, boron can remain invisible in such nanometric sized structures. Also, size effects can induce differences between the actual device and larger test zones used for monitoring these technologies. This paper presents results obtained by APT from two advanced nodes, in contrast to complementary techniques. Using different methodologies, including specific APT-friendly test structures and multiple-impact data filtering, the dopant behaviour in these structures can be better understood. An unexpected boron distribution in both the MOSFET source/drain and HBT base regions has been highlighted.Two types of industrial transistor technologies have been studied using atom probe tomography (APT). Both 14 nm node high-K metal-oxide-semiconductor field effect transistors (MOSFETs) on ultrathin body and buried oxide and 320 GHz Ft Si/SiGe Heterojunction Bipolar Transistors (HBT) embedded in a 55-nm BiCMOS chip have been analysed and their atomic distribution has been mapped. Due to the limitations of routine characterisation techniques, boron can remain invisible in such nanometric sized structures. Also, size effects can induce differences between the actual device and larger test zones used for monitoring these technologies. This paper presents results obtained by APT from two advanced nodes, in contrast to complementary techniques. Using different methodologies, including specific APT-friendly test structures and multiple-impact data filtering, the dopant behaviour in these structures can be better understood. An unexpected boron distribution in both the MOSFET source/drain and HBT base regions has...

Dealing With Multiple Grains in TEM Lamellae Thickness for Microstructure Analysis Using Scanning Precession Electron Diffraction

Materials microstructure is a source of variability in devices performance considering today’s transistor feature sizes. As the well-known Electron BackScatter Diffraction (EBSD) technique [1] shows limitations to characterize grains orientation smaller than a hundred nanometers, new tools have been developed over the past few years to characterize the texture of crystalline materials at nanometer scale. Among them is the ASTAR tool based on the acquisition and indexation of Precession Electron Diffraction (PED) patterns acquired in scanning mode [2]. Although its use has proved to be efficient to analyze nano-crystalline materials [3], indexation issues appear when crystal grains size is significantly smaller than the lamella thickness. For such cases, the acquired images are composed of a superimposition of several diffraction patterns. Strong expertise and time is required to prepare ultra-thin TEM lamellae adapted for the analysis of current nanometer scale transistor devices so that only the feature of interest remains in the thickness while left crystalline. As an alternative, a dedicated procedure is proposed to overcome crystal overlapping issues and exploit volume information: each diffraction pattern is iteratively re-indexed after subtraction of the reflections related to the main—or previous— solution. In this work, this technique is used to study the microstructure of a material when several crystalline phases remain in the TEM lamella thickness.

Retrieving overlapping crystals information from TEM nano-beam electron diffraction patterns

The diffraction patterns acquired with a transmission electron microscope (TEM) contain Bragg reflections related to all the crystals superimposed in the thin foil and crossed by the electron beam. Regarding TEM‐based orientation and phase characterisation techniques, the nondissociation of these signals is usually considered as the main limitation for the indexation of diffraction patterns. A new method to identify the information related to the distinct but overlapped grains is presented. It consists in subtracting the signature of the dominant crystal before reindexing the diffraction pattern. The method is coupled to the template matching algorithm used in a standard automated crystal orientation mapping tool (ACOM‐TEM). The capabilities of the approach are illustrated with the characterisation of a NiSi thin film stacked on a monocrystalline Si layer. Then, a subtracting‐indexing cycle applied to a 70 nm thick thin foil containing polycrystalline tungsten electrical contacts shows the capability of the technique to recognise small nondominant grains.

A Comparative Analysis of a Si/SiGe Heterojunction-Bipolar Transistors: APT, STEM-EDX and ToF-SIMS

Due to the complexity of characterising compound semiconductors, including dopant distribution, multiple characterisation techniques are needed. Traditionally time-of-flight secondary ion mass spectroscopy (SIMS) has been the tool of choice for chemical profiling of semiconductor systems. Although it affords a lower limit of detection, it is constrained by a low lateral resolution, making large test zones necessary (several hundred microns). More recently, energy dispersive X-ray scanning transmission electron microscopy (STEM-EDX) allows local specimen preparation and can generate 2D concentration maps. But due to low sensitivity it cannot quantify light elements (i.e. boron). Because of size effects, large test zones are not always representative of the local chemistry in the device and a complete picture is therefore unavailable. Atom probe tomography (APT) is an analytical 3D microscopy technique which maps the position of atoms in a material allowing composition measurements of a small selected volume. With a sub-nanometre spatial resolution, analysis of localised structures is possible and all elements are detected with the same probability. Initially dedicated to metals, semiconductor applications have escalated in recent years [1].

Synchrotron radiation-based characterization of interconnections in microelectronics: recent 3D results

In microelectronics, more and more attention is paid to the physical characterization of interconnections, to get a better understanding of reliability issues like voiding, cracking and performance degradation. Those interconnections have a 3D architecture with features in the deep sub-micrometer range, requiring a probe with high spatial resolution and high penetration depth. Third generation synchrotron sources are the ideal candidate for that, and we show hereafter the potential of synchrotron-based hard x-ray nanotomography to investigate the morphology of through silicon vias (TSVs) and copper pillars, using projection (holotomography) and scanning (fluorescence) 3D imaging, based on a series of experiments performed at the ESRF. In particular, we highlight the benefits of the method to characterize voids, but also the distribution of intermetallics in copper pillars, which play a critical role for the device reliability. Beyond morphological imaging, an original acquisition scheme based on scanning Laue tomography is introduced. It consists in performing a raster scan (z,θ) of a sample illuminated by a synchrotron polychromatic beam while recording diffraction data. After processing and image reconstruction, it allows for 3D reconstruction of grain orientation, strain and stress in copper TSV and also in the surrounding Si matrix.