Laurent Clement

Improved precision in strain measurement using nanobeam electron diffraction

Improvements in transmission electron microscopy have transformed nanobeam electron diffraction into a simple and powerful technique to measure strain. A Si0.69Ge0.31 layer, grown onto a Si substrate has been used to evaluate the precision and accuracy of the technique. Diffraction patterns have been acquired along a ⟨110⟩ zone axis using a FEI-Titan microscope and have been analyzed using dedicated software. A strain precision of 6×10−4 using a probe size of 2.7 nm with a convergence angle of 0.5 mrad has been reached. The bidimensional distortion tensor in the plane perpendicular to the electron beam has been obtained.

FDSOI devices with thin BOX and ground plane integration for 32nm node and below

In this paper we compare Fully-Depleted SOI (FDSOI) devices with different BOX thicknesses with or without ground plane (GP). With a simple High-k/Metal gate structure, the 32 nm devices exhibits Ion/Ioff performances well situated for low power (LP) applications. The different BOX thicknesses and ground plane conditions are compared with bulk shrunk technology in terms of variability and noise. 0.499 mum2 SRAM cell has been characterized with less than 50 pA of standby current/cell and a SNM of 210 mV @ Vdd 1V.

Grain boundary as relevant microstructure feature for electromigration in advanced technology studied by Electron BackScattered Diffraction

The work presented in this paper shows the links between electromigration (EM) in copper interconnects and microstructure of copper. Metal lines of 70 nm width corresponding to minimum width of 45–40 nm technology node are aged by electromigration (EM) test. Electron Backscattered Diffraction (EBSD) technique is then used to characterize microstructure and orientation of copper grains around void(s) resulting from EM. Advanced TEM and STEM characterization have also been used to assess reliability of EBSD technique (void localization, texture determination) applied to very small dimensions. Finally, the influence of cobalt (Co) as capping or sidewall liner and Aluminum-Copper alloy (CuAl) seed layer were investigated by EM tests and physical characterization. Our results confirm that critical microstructure parameter for electromigration phenomena in copper is grain boundary and in particular high angle misoriented grain boundaries.

Macroscopic and nanometer scale stress measurement of Ni(Pt)Si silicide: Impact of thermal treatments ranging from millisecond to several hours

The authors have measured and compared the stress in nickel silicide full sheet layers prepared with added platinum on (001) p-type Si wafers by using either a rapid thermal anneal (RTA) at 390 °C or a millisecond submelt laser dynamic scanning anneal (DSA) at 800 °C. The room temperature tensile stress of the silicide annealed with DSA is 1.65 GPa, whereas that of the silicide annealed with RTA at 390 °C is 800 MPa. Our analysis confirms that the origin of the stress lies in thermal expansion factors. Despite some small variations, the stress remains highly tensile in both layers after a 1 h post-treatment at 400 °C, with values of 1.4 GPa and 850 MPa for the DSA and RTA samples, respectively. The authors also performed strain measurements with dark field electron holography in the source drain region of 28 nm field complementary metal oxide semiconductor field effect transistors, under the silicide dot. They then determined the stress inside the silicide by combining the strain measurement with finite element mechanical simulations; values of 1.5 GPa and 600 MPa were found at the nanometer scale for the DSA and RTA samples, respectively, which are consistent with the macroscopic observations.

Microstructure and texture analysis of advanced copper using electron backscattered diffraction and scanning transmission electron microscopy

In this article, we focus on the characterization of copper interconnect by Electron Backscattered Diffraction (EBSD) in the final aim of reliability issue investigation. In a first time we demonstrate that we achieve to characterize copper lines of 70 nm width after some improvements in sample preparation. Then, after showing that EBSD is well adapted to characterize our structure even for very small dimensions (line width smaller than 100 nm), we propose to associate Transmission Electron Microscope in scanning mode (STEM) to complete information given by EBSD and localize defects due to electromigration. We begin by highlighting the very good correspondence between EBSD map and STEM images on line with small microstructure and finally we apply both techniques on a tested copper line after electromigration. In this case we show the relevance of using STEM to localize the defect due to electromigration which can not be seen on EBSD map.

Boron atomic-scale mapping in advanced microelectronics by atom probe tomography

Two types of industrial transistor technologies have been studied using atom probe tomography (APT). Both 14 nm node high-K metal-oxide-semiconductor field effect transistors (MOSFETs) on ultrathin body and buried oxide and 320 GHz Ft Si/SiGe Heterojunction Bipolar Transistors (HBT) embedded in a 55-nm BiCMOS chip have been analysed and their atomic distribution has been mapped. Due to the limitations of routine characterisation techniques, boron can remain invisible in such nanometric sized structures. Also, size effects can induce differences between the actual device and larger test zones used for monitoring these technologies. This paper presents results obtained by APT from two advanced nodes, in contrast to complementary techniques. Using different methodologies, including specific APT-friendly test structures and multiple-impact data filtering, the dopant behaviour in these structures can be better understood. An unexpected boron distribution in both the MOSFET source/drain and HBT base regions has been highlighted.Two types of industrial transistor technologies have been studied using atom probe tomography (APT). Both 14 nm node high-K metal-oxide-semiconductor field effect transistors (MOSFETs) on ultrathin body and buried oxide and 320 GHz Ft Si/SiGe Heterojunction Bipolar Transistors (HBT) embedded in a 55-nm BiCMOS chip have been analysed and their atomic distribution has been mapped. Due to the limitations of routine characterisation techniques, boron can remain invisible in such nanometric sized structures. Also, size effects can induce differences between the actual device and larger test zones used for monitoring these technologies. This paper presents results obtained by APT from two advanced nodes, in contrast to complementary techniques. Using different methodologies, including specific APT-friendly test structures and multiple-impact data filtering, the dopant behaviour in these structures can be better understood. An unexpected boron distribution in both the MOSFET source/drain and HBT base regions has...

Electron Backscattered Diffraction Analysis Of Narrow Copper Interconnects In Cross‐View To Investigate Scale Effect On Microstructure.

In this article, we propose to use Electron Backscattered Diffraction (EBSD) to characterize microstructure of copper interconnects of thin metal level in top view and cross view. These two views give very complementary information about microstructure of copper and thus about recrystallization of copper during annealing. Moreover, for minimum width, as interconnect is two times thicker than wide; It will be easier to analyze smaller interconnect of 45 nm node technology in cross‐section. We look for evolution of texture and microstructure of copper with line width in top view and in cross view. We highlight the presence of two recrystallization mechanisms and also the fact that transition from one to the other is progressive with competition of both mechanisms.

A Comparative Analysis of a Si/SiGe Heterojunction-Bipolar Transistors: APT, STEM-EDX and ToF-SIMS

Due to the complexity of characterising compound semiconductors, including dopant distribution, multiple characterisation techniques are needed. Traditionally time-of-flight secondary ion mass spectroscopy (SIMS) has been the tool of choice for chemical profiling of semiconductor systems. Although it affords a lower limit of detection, it is constrained by a low lateral resolution, making large test zones necessary (several hundred microns). More recently, energy dispersive X-ray scanning transmission electron microscopy (STEM-EDX) allows local specimen preparation and can generate 2D concentration maps. But due to low sensitivity it cannot quantify light elements (i.e. boron). Because of size effects, large test zones are not always representative of the local chemistry in the device and a complete picture is therefore unavailable. Atom probe tomography (APT) is an analytical 3D microscopy technique which maps the position of atoms in a material allowing composition measurements of a small selected volume. With a sub-nanometre spatial resolution, analysis of localised structures is possible and all elements are detected with the same probability. Initially dedicated to metals, semiconductor applications have escalated in recent years [1].

Characterization of stress transmission from silicon nitride layer to transistor channel

In this paper, we characterize contact etch stop layer (CESL) stress transmission to transistor conduction channel with a new observation technique using transmission electron microscopy in dark-field mode, called dark-field electron holography. First, we explain CESL elaboration by presenting deposition mode and post-deposition film treatment. Then, we describe in detail dark-field electron holography experiments and we establish a link between experimental results and simulation.

Characterization of Strain Induced by PECVD Silicon Nitride Films in Transistor Channels

In order to reach high levels of transistor performance, it is desirable to increase electrical conductivity of the device. An efficient way to enhance carrier mobility in the conduction channel is to generate strain in the structure using process‐induced stress. To achieve that, stress engineering of the contact etch stop layer (CESL), an amorphous hydrogenated silicon nitride film deposited by plasma enhanced chemical vapour deposition on top of the metal oxide semiconductor assembly, is widely used since it is a low‐cost technique. Indeed, this film possesses an intrinsic stress that can be set from tensile (σ = 1.6 GPa) to compressive (σ = −3.0 GPa) depending on deposition conditions. From an electrical point of view, strain induced in the silicon channel can lead to an increase of carrier mobility as high as 8–10% which in turn increases Ion/Ioff and decreases switching time of the transistor. Usually, strain induced in the channel is very low (0.1–0.3%), making quantitative measurements challenging....