Fabrizio Fausto Renzo Toia

Via first approach optimisation for Through Silicon Via applications

Through Silicon Via (TSV) is a very attractive solution for 3D stacking. Currently the main technique in industrial TSV processes is the via-last approach. But the via-first approach has also many advantages and in particular allows the use of high thermal budget materials for high voltage applications.

A novel 0.35µm 800V BCD technology platform for offline applications

Here is presented the development of the new BCD800 platform which conjugates 3.3V CMOS logic, 5/25/30V power devices and a 800V nLDMOS in a 0.35μm technology node. LV components can be placed into a floating pocket which can be referred up to 650V, furthermore this process features an innovative lateral junction isolation module obtained by a boron-doped poly-filled deep trench with great advantages in terms of performances and area saving. The process industrialization has been demonstrated and a fully functional test vehicle is available in the form of a single-chip High Voltage Smart Gate Driver for half bridges.

20V-40V Symmetrical Vertical Trench nMOS (SVT MOS) design for display driver ICs

This paper presents a novel 20V/40V symmetrical vertical trench MOS (SVT MOS) having both drain extension and gate realized in vertical direction respect to the silicon surface. Using silicon depth to realize the gate and to withstand high voltage, carefully designing doping implants and realizing a vertical field oxide, it was possible to reduce more than 60% the device pitch (i.e. spacing between half drain contact and half source contact) maintaining the same performance of equivalent lateral device