Claudio Contiero

BCD8 from 7V to 70V: a new 0.l8μm Technology Platform to Address the Evolution of Applications towards Smart Power ICs with High Logic Contents

This paper presents the 8th BCD generation integrating power and high voltage devices in a 0.18 μm technology node platform. Both dense 1.8 V and 3.3 V logic CMOS are available to realize complex monolithic solutions in the field of smart power applications.

Smart power approaches VLSI complexity

This paper reviews the latest trends in the mixed power process field driven by the need to integrate increasing numbers of functions on the same chip. The more recent BCD (bipolar-CMOS-DMOS) examples are a demonstration of how smart power technology evolves following, with some delay, the road maps of VLSI CMOS and BiCMOS. The issues behind the trend to converge to a common technology platform, maintaining the peculiar aspects of power functions integration, are discussed, as well as new possible realizations in the field of super smart power ICs.

Hot-carrier reliability in submicrometer LDMOS transistors

This paper provides a physical basis for the experimentally determined hot-electron-limited safe operating area of submicrometer LDMOS transistors under static bias conditions. The physical interpretation of the device behavior is based on the analysis of the bias-dependent gate and substrate currents and of the relative induced degradation.

Hot-electron-induced degradation in high-voltage submicron DMOS transistors

The degradation induced by hot-electrons is investigated in small-size lateral and vertical DMOS transistors with voltage rating from 16 to 60 V integrable in a multi-power Bipolar-CMOS-DMOS mixed process with 1.2 /spl mu/m minimum lithography. Dedicated hot-electron tests are necessary to define the maximum operating drain and gate voltage of the devices. An empirical extrapolation model and a simplified scheme for accelerated qualification/reliability tests are proposed allowing one to define the hot-electron-limited safe operating area of DMOS transistors. A quasi-static extension of the model accounts for the hot-electron-induced degradation under a variety of dynamic bias-stress conditions.

Roadmap Differentiation and Emerging Trends in BCD Technology

This paper reviews the BCD technology roadmap and its evolution towards finer lithography features, wider voltage capability offer and the broadening variety of integrable components. The splitting of the roadmap into three main directions - high-voltage, high-power and high-density -and the different evolving criteria are discussed. The trend of more recent BCD versions to converge to technology platforms common to advanced CMOS processes, diversifying or simplifying the technology according to different application needs, the emerging and consolidation of new directions are presented. Examples of possible realizations in different application fields using the more suitable BCD approach are also proposed.

LDMOS implementation by large tilt implant in 0.6 /spl mu/m BCD5 process, flash memory compatible

This paper describes a method for integrating power LDMOS structures in a smart power Bipolar-CMOS-DMOS technology called BCD5 designed at 0.6 /spl mu/m, compatible with VLSI EPROM, EEPROM and flash non volatile memories (NVM). The compatibility between NVM and LDMOS is achieved replacing conventional DMOS manufacturing processes, consisting of high temperature diffusion steps, with an innovative approach that exploits large angle of tilt implantation technique.

Characteristics and applications of a 0.6 /spl mu/m bipolar-CMOS-DMOS technology combining VLSI non-volatile memories

This paper describes the 5th generation, designed at 0.6 /spl mu/m, of the BCD process family commercially introduced ten years ago. Called BCD5, this smart power process provides very dense and high performance bipolar, CMOS and DMOS functions and is compatible with VLSI EPROM, EEPROM and Flash Non-Volatile Memories. Extremely complex systems requiring analog, digital and power functions, /spl mu/P cores and significant amount of memories (hundreds of Kbits) can be realized in one chip (Super Smart Power integration) using BCD5.

Hot-electron injection and trapping in the gate oxide of submicron DMOS transistors

The basic parameter controlling the hot-electron safe operating area of DMOS transistors integrable in submicron bipolar-CMOS-DMOS mixed processes is the series resistance of the n-type lightly-doped layer on the source side of the devices. The hot-electron-induced degradation in DMOS transistors is correlated with the hot-electron gate current, rather than with the substrate (p-body) current, and its measurement is a sensitive, nondestructive way to bypass long-term reliability tests.

Overstress and electrostatic discharge in CMOS and BCD integrated circuits

Abstract The ESD qualification of the new technologies is obtained by testing different device structures an comparing the ESD robustness evaluated by means of different testing methods (HBM, MM, CDM and TLP). The influence of the layout parameters on the ESD robustness must also be characterized. In this paper we will present data concerning the ESD robustness of both 0.35 μm CMOS and 0.6 μm smart power (BCD5) protection structures. A study of the influence of layout parameters on the ESD robustness with different test methods (HBM, CDM and TLP) will be given. Failure analysis by means of electrical characterization, Emission Microscopy and SEM inspection will also been presented.

0.18 μm BCD -High Voltage Gate (HVG) Process to address Advanced Display Drivers Roadmap

This paper describes BCD-HVG8 (High Voltage Gate) process family, a technology optimized to address the small size display driver applications. 20/32/40V devices with thick gate oxide (Vgs max=25V) have been successfully integrated in a 0.18µm BCD platform. Thanks to its flexibility and modularity, the obtained process is suitable to cover the design requirements coming from all of the present different display realization techniques: passive Liquid Crystal Display (LCD), Thin Film Transistors (TFT) or Organic Light Emission Diodes (OLED).