Fanshu Jiao

Analog Circuit Design Knowledge Mining: Discovering Topological Similarities and Uncovering Design Reasoning Strategies

Mining engineering metaknowledge from electronic documents is important in devising new design solutions for emerging applications as well as in identifying new business opportunities. Continuously and comprehensively reviewing and assessing the entire technical literature to find the most relevant ideas and solutions is cumbersome as engineering innovations are constantly being proposed. In particular, high performance analog circuit design has been at the forefront of technological innovations given their importance in applications, like telecommunications, mobile applications, and health care. This paper proposes a model and mining techniques for representing analog circuit design metaknowledge. The metaknowledge representation includes three components: an associative component presenting the conceptual hierarchy of the considered circuits, a component expressing the performance capabilities (e.g., tradeoffs and bottlenecks) of the circuits, and a causal modeling part describing the more likely starting ideas and design plans used to create a circuit. Knowledge structures can be used to tackle new applications, identify opportunities to improve existing circuits, and validate design correctness. A case study illustrates the proposed knowledge structure for a set of 30 modern, high-frequency analog circuits.

A low-voltage, low-power amplifier created by reasoning-based, systematic topology synthesis

This paper introduces a three stage low voltage, low power amplifier created by a design knowledge-intensive circuit topology synthesis methodology. The synthesis method flow begins with a set of starting ideas and then continues with a sequence of justified, causal design steps. Starting ideas combine physical and abstract features from either previous design or new insight. After combining the starting ideas, the related design sequence is identified step by step, so that each step either improves performance or relaxes design constraints. The created Opamp is a novel low voltage, low power circuit with better setting time (small signal characteristic) and slew rate (large signal characteristic). The proposed Opamp is realized in 0.2-μm CMOS technology. At 1-V supply voltage, it consumes less than 70μW static power. When driving a 5-pF capacitive load, the amplifier achieves 24MHz gain-bandwidth-product (GBW) and 5.1-V/μs average slew rate.

Knowledge-intensive, causal reasoning for analog circuit topology synthesis in emergent and innovative applications

Analog circuit topology design has been difficult to automate. Topology synthesis involves searching an open-ended, widely extensible, and strongly discontinuous solution space. Existing algorithms cannot generate topologies beyond a constrained set of structures, or experience difficulties in evolving performance-effective yet minimal circuits. This paper proposes a new topology synthesis method that implements a design knowledge-intensive reasoning process to create novel circuit structures with all their features justified by the problem requirements. Two synthesis experiments demonstrate the capability of the method to generate circuits beyond the capabilities of existing topology synthesis algorithms.

Analog circuit topological feature extraction with unsupervised learning of new sub-structures

This paper presents novel techniques to automatically extract the topological (structural) features in analog circuits. The extracted features include basic building blocks, structural templates and hierarchical structures. Finding structural features is important for tasks like circuit synthesis and sizing, design verification, design reuse, and design knowledge description, summarization and management. The paper presents algorithms for supervised feature extraction and unsupervised learning of new block connections. Experiments discuss feature extraction for a set of 34 state-of-the-art analog circuits.

Causal reasoning mining approach to analog circuit verification

Functional errors in analog portion of mixed signal circuits become more severe and improvements in verification methods are increasingly important. Current verification methods fall into two categories, simulation-based verification and formal verification (Barke et al. [1]), focusing on verifying analog circuit function/performance. This paper proposes a novel approach verifying analog circuit design using causal reasoning. Causal reasoning is the inductive reasoning process to create a new design. The flow begins with mining the causal reasoning steps (design plan) that produced the circuit, including starting ideas, design step sequence, and their justifications (Jiao et al., 2015 [2]). Then, topological features corresponding to the starting ideas and design step sequence are verified individually by replacing the related devices with ideal behavior model. Performance is evaluated through Cadence Spectre simulation. Comparison with new circuit performance reveals incorrect functional issues and/or performance potentials for improvement. They are negative causes of certain starting ideas or design steps, which might have been omitted during the design process. The paper discusses three operational amplifier designs realized in 0.2-m CMOS technology to illustrate the verification approach.

A causal reasoning-based approach for analog circuit verification

This paper proposes a novel analog circuit verification approach using causal reasoning. To verify analog circuits, the flow begins with mining the causal reasoning steps (design plan) that produced the circuit, including starting ideas, design step sequence, and their justification [1]. Then, topological structures corresponding to the starting ideas and design step sequences are verified individually by replacing the related devices with ideal amplifier model. Circuit performance is evaluated through Spectre simulation. Comparing simulation results reveals incorrect functional issues and/or performance drawbacks (negative causes) of certain starting ideas or design steps, which might have been omitted during the design process. The paper discusses three operational amplifier designs realized in 0.2-μm CMOS technology to illustrate the verification approach.

I-Flows: A Novel Approach to Computational Intelligence for Analog Circuit Design Automation Through Symbolic Data Mining and Knowledge-Intensive Reasoning

This chapter presents an overview of the authors’ ongoing work toward devising a new approach to analog circuit synthesis. The approach computationally implements some of the facets of knowledge-intensive reasoning that humans perform when tackling new design problems. This is achieved through a synthesis flow that mimics reasoning using a domain-specific knowledge structure with two components: an associative part and a causal reasoning part. The associative part groups known circuit schematics into abstractions based on the similarities and differences of their structural features. The causal reasoning component includes the starting ideas as well as the design sequences that create the existing circuits.