Farooq Ahmad Khanday

Square-Root-Domain Realization of Single-Cell Architecture of Complex TDCNN

Square-root-domain (SRD) CMOS analog realization of a single cell architecture of the complex Temporal Derivative Cellular Neural Networks (TDCNNs) is introduced in this paper. TDCNN initiates time derivative ‘diffusion’ between CNN cells for non-separable spatiotemporal filtering applications, where the input to the CNN is an image that changes over time. The evaluation of the performance of the complex SRD TDCNN cell has been done using the Cadence Orcad software with TSMC 0.18-μm CMOS process model parameters. The provided simulated results confirm the validity of the theory.

A novel universal (FNZ) gate in quantum dot cellular automata (QCA)

As transistor geometries are reduced, quantum effects begin to dominate device performance. At some point, transistors cease to have the properties that make them useful computational components. New computing elements must be developed in order to keep pace with Moores Law. Quantum dot cellular automata (QCA) represent an alternative paradigm to transistor-based logic. It has attractive features such as faster speed, smaller size and low power consumption than transistor based technology. By taking the advantages of QCA, we are able to design interesting computational architectures. QCA architectures have been designed by employing either the inverter and the majority gate or universal gates such as And-Or-Inverter (AOI) and Nand-Nor-Inverter (NNI). A new universal QCA logic gate called as FNZ gate is introduced in this paper which enjoys superior performance vis-à-vis the already introduced universal gates. The implementation of various logic functions using the proposed FNZ Gate is also demonstrated. The functionality of the FNZ Gate designs is verified by QCA Designer tool where a detailed comparison with the previously reported designs confirms the reliable performance of the proposed designs.

Sinh-Domain multiphase sinusoidal oscillator

A Multiphase Sinusoidal Oscillator (MSO) configuration derived by employing appropriate non-linear transconductors which implement lossy integrators in the Sinh-Domain is introduced in this paper. Owing to its companding nature, the oscillator offers the benefits of electronic tuning of the oscillation frequency and the capability for operating in a low-voltage environment. In addition, the condition of oscillation could be electronically adjusted without disturbing the oscillation frequency. This has been achieved by introducing a novel Sinh-Domain lossy integrator topology. The performance of the proposed oscillator has been evaluated through a design example, where a six-phase topology has been simulated by utilizing the Analog Design Environment of the Cadence software.

Ultra-low-Voltage Integrable Electronic Realization of Integer- and Fractional-Order Liao’s Chaotic Delayed Neuron Model

The neurons are proven to show chaotic dynamical behavior, and due to this behavior, they find applications in several fields. Recently, the chaotic behavior of the neuron model using non-monotonous Liao’s activation function was described and its design using op-amp was presented. The presented design is a high-voltage one and is not integrable, as both passive resistors and inductors have been employed. Besides, most of the components are of floating type, which are difficult to design on an integrated chip. In addition, only integer-order design has been considered. In this paper, an ultra-low-voltage sinh-domain implementation of the neuron model has been introduced. Moreover, for the first time, the fractional-order implementation of the model has also been presented. The design offers the advantages of: (a) low-voltage implementation, (b) integrable design, (c) resistor and inductor less design, (d) using only grounded components, and (e) low-power design due to the inherent class AB nature of sinh-domain technique. The proper functioning of the model has been verified through different cases where the time constant of the integrator, delay and fractional order have been varied. The behavior of the neuron models is evaluated through HSPICE simulator using the metal oxide semiconductor transistor (MOSFET) models provided by Taiwan Semiconductor Manufacturing Company Limited (TSMC) 130 nm complementary metal oxide (CMOS) process.

Universal filters of arbitrary order and type employing square-root-domain technique

Novel Single Input Multiple Output (SIMO) and Multiple Input Single Output (MISO) universal filter topologies of arbitrary order and type are introduced in this paper. The proposed topologies have been realised by employing Square-Root Domain (SRD) technique. An offered benefit of the universal filter topologies is that only grounded capacitors are required for their implementations and the resonant frequency of the filters can be electronically controlled by an appropriate dc current. The proposed universal filters simultaneously offer all the five standard filtering functions i.e. Lowpass (LP), Highpass (HP) and Bandpass (BP), Bandstop (BS) and Allpass (AP) frequency responses. In addition, the SIMO topology is generic in the sense that it can yield four different stable filter configurations. Two design examples are provided in each configuration and the correct operation of the corresponding topologies has been evaluated through the PSPICE software with BSIM 0.35-µm CMOS process model parameters.

A Generic Current Mode Design for Multifunction Grounded Capacitor Filters Employing Log-Domain Technique

A generic design (GD) for realizing an nth order log-domain multifunction filter (MFF), which can yield four possible stable filter configurations, each offering simultaneously lowpass (LP), highpass (HP), and bandpass (BP) frequency responses, is presented. The features of these filters are very simple, consisting of merely a few exponential transconductor cells and capacitors; all grounded elements, capable of absorbing the shunt parasitic capacitances, responses are electronically tuneable, and suitable for monolithic integration. Furthermore, being designed using log-domain technique, it offers all its advantages. As an example, 5th-order MFFs are designed in each case and their performances are evaluated through simulation. Lastly, a comparative study of the MFFs is also carried, which helps in selecting better high-order MFF for a given application.

Realization of Integrable Incommensurate-Fractional-Order-Rössler-System Design Using Operational Transconductance Amplifiers (OTAs) and Its Experimental Verification

In this paper, electronic implementation of fractional-order Rossler system using operational transconductance amplifiers (OTAs) is presented which until now was only being investigated through numerical simulations. The realization offers the benefits of low-voltage implementation, integrability and electronic tunability. In addition, the proposed circuit is a MOS only design (as no BJTs have been used) which contains only grounded components and is therefore suitable for monolithic VLSI design. The chaotic behavior of the fractional-order Rossler system in consideration with the incommensurate orders has been demonstrated which finds many applications in several fields. The theoretical predictions of the proposed implementation have been verified through experimentation and HSPICE simulator using Austrian Micro System (AMS) 0.35μm CMOS process and the obtained results have been found in good agreement with the Matlab simulink theoretical results obtained using FOMCON simulink toolbox. Besides, a secure message communication system has been considered to demonstrate fully the usefulness of the chaotic system.

0.5 V sinh-domain differentiator

A differentiator topology realised by employing the concept of the filtering in the sinh-domain is introduced in this article. This is constructed from appropriately configured non-linear transconductor cells. The employment of MOS transistors operated in the weak inversion region offers the capability for ultra-low-voltage operation. Additional benefits are the electronic adjustment of the frequency characteristics and the inherent class-AB operation of the differentiator, originated from its sinh-domain nature. The performance of the differentiator has been evaluated and compared with that achieved by the corresponding already introduced log-domain topology.

1.2 V Sinh-Domain allpass filter

A first-order Sinh-Domain allpass filter topology is introduced in this paper. It is constructed from a class-AB current mirror and appropriately configured non-linear transconductor cells. Due to the inherent class-AB nature of Sinh-Domain filters, the proposed topology offers the capability for handling currents at levels greater than that of the dc bias current level. Also, it offers the well-known features of companding filters such as electronic adjustment of its frequency characteristics and the capability for operation in a low-voltage environment. In addition, a four-phase sinusoidal oscillator design example has been provided. The behaviour of the proposed topology has been evaluated and compared with other already known configurations, where the most important performance factors have been considered. Copyright

Fractional-order filter design for ultra-low frequency applications

The paper presents a novel scheme to implement fractional-order filters for ultra-low frequency applications. The scheme is based on the intrinsic property of the fractional-order filters that the pole frequency can be scaled down to sub-hertz by employing the order if the normal pole frequency of the filter is designed slightly less than one. This is in contrast to the scaling techniques employed in low-frequency integer-order filters where the impedance is scaled to decrease the overall capacitance required for low-frequency design. The functioning of the scheme has been demonstrated by an OTA-based low-pass filter example implemented with 0.35μm technology node at ± 1.2V supply voltage.