Felix Madlener

A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over \( \mathbb{G}\mathbb{F}\left( {2^n } \right) \)

The performance of elliptic curve based public key cryptosystems is mainly appointed by the efficiency of the underlying finite field arithmetic. This work describes two generic and scalable architectures of finite field coprocessors, which are implemented within the latest family of Field Programmable System Level Integrated Circuits FPSLIC from Atmel, Inc. The HW architectures are adapted from Karatsuba’s divide and conquer algorithm and allow for a reasonable speedup of the top-level elliptic curve algorithms. The VHDL hardware models are automatically generated based on an eligible operand size, which permits the optimal utilization of a particular FPSLIC device.

Novel hardening techniques against differential power analysis for multiplication in GF(2 n )

Side channel attacks have changed the design of secure cryptosystems dramatically. Today a reasonable designed cryptosystem has not only to be cryptographically secure, but resistant against side channel attacks as well. Therefore, a lot of countermeasure techniques have been developed in the last years to avoid exploitable information leaking. In this paper we introduce a new approach to secure the multiplication in GF(2n), an essential operation of elliptic curve cryptography, against differential power analysis attacks. Our hiding technique improves the resistance of a multiplier, even if the attacker has strong knowledge about its architecture. It is scalable and allows to choose arbitrary trade-offs between performance and side channel resistance. The additional costs to secure the multiplier are very low compared to other countermeasures.

SC-DEVS: an efficient SystemC extension for the DEVS model of computation

This paper describes a systematic approach to integrate the Discrete Event Specified System (DEVS) methodology into SystemC. It thus combines Model of Computation (MoC) specific properties and the features of an advanced SystemC environment. The execution of abstract system level DEVS models is comparable to pure SystemC models and is significantly faster compared to other DEVS environments. Thus, system level models based on abstract MoCs may easily be executed in a SystemC environment. The proposed integration is realized as a non-introspective extension to the SystemC 2.2 kernel. The DEVS models are implemented on an additional software layer above the SystemC simulation kernel. Our approach may be used simultaneously with other layered extensions, e.g., SystemC-AMS or TLM.

Verification of dynamically reconfigurable embedded systems by model transformation rules

This paper describes a methodology for the verification of reconfigurable embedded systems. The reconfigurable systems are described by means of the Reconfigurable Discrete Event Specified System (RecDEVS) computational model and the verification is performed by a model transformation from the RecDEVS model into an equivalent representation for the UPPAAL model checking methodology. We introduce an algorithm for the automatic transformation of such models, which originate from disjoint application domains. This allows the usage of an state-of-the art verification tool for the verification of arbitrary properties of system specifications denoted in RecDEVS. We also present a set of important system properties, which now may be verified. This set includes some fundamental reconfiguration domain specific properties, which were not addressed by previous formal verification methods. The feasibility of this approach is demonstrated for a complex automotive application.

Procedures for Securing ECC Implementations Against Differential Power Analysis Using Reconfigurable Architectures

Side channel attacks have changed the design of secure cryptosystems dramatically. Today a reasonable designed cryptosystem has not only to be cryptographically secure, but to be resistant against side channel attacks as well. Therefore many countermeasure techniques have been developed in the last years to avoid exploitable information leaking. We introduce new concepts of countermeasure approaches against differential power analysis attacks to an essential operation of elliptic curve cryptography in \(\mathbb {GF}(2^{n})\) . Similar to many other published countermeasures we are focusing on the architecture layer to secure the cryptographic operations. This type of countermeasures is geared to the well-known hiding methods in this research field, but we apply them on a different implementation layer. For securing the multiplication over \(\mathbb {GF}(2^{n})\) , an essential operation in elliptic curve cryptography, we propose a countermeasure, which is highly scalable and thus allows to select arbitrary trade-offs between performance and side channel resistance.

A System Level Design Flow for Embedded Systems based on Model of Computation Mappings

This paper describes an embedded systems design flow containing Models of Computation (MoC). We thoroughly survey the different abstraction layers and detail a modeling hierarchy for a MoC-based design flow. Thus, we outline different MoC-classes where the MoCs can be transformed horizontally into each other and successively transformed vertically down to SystemC. Therefore, our proposed design flow can benefit both from MoC specific properties and the features of an advances SystemC environment. The feasibility of our approach is demonstrated by the transformation of the Discrete Event Specified Systems model (DEVS) into SystemC for a complex real life design.

RecDEVS: A Comprehensive Model of Computation for Dynamically Reconfigurable Hardware Systems

Abstract This paper introduces a novel formal model of computation denoted as RecDEVS. It is targeted to the development of dynamically reconfigurable hardware systems, a domain that still misses a formal design methodology. RecDEVS supports the description of hardware reconfiguration as a native part of a system model and thus can be used as a foundation of new design methodologies. Reconfiguration is addressed by means of a small set of reconfiguration commands and a dedicated executive component. Special care has been taken to support the flexible communication network of dynamically changeable hardware structures. We describe how RecDEVS benefits from the Dynamic Structure Discrete Event Specified Systems (DSDEVS) model that has been generalized. To illustrate the feasibility of the proposed approach the implementation of RecDEVS inside on top of SystemC based simulation engine is demonstrated.