Feng Xiaoxing

Design and implementation of a security-enhanced baseband system for UHF RFID tag

This paper presents a security-enhanced baseband system for UHF RFID tag, which is based on ISO18000-6B protocol. The proposed baseband system consists of the following modules: Receiver, Controller, Power Management (PM), Transmitter, Advanced Encryption Standard with 128 bits cryptographic key (AES-128), and Cyclic Redundancy Check (CRC). AES-128 is the encryption engine, which is designed and implemented properly for low cost requirement. Tag uses AES-128 to protect sensitive data in memory and realize mutual authentication with reader. As the actual length of data transacted between reader and tag is less than 128 bits, a novel data flow is given to enhance security strength. The chip was designed using 0.18µm CMOS process. Total area of the baseband system is 685µmX360µm excluding pads. Power analysis shows that it consumes 6.9µw@1V. The chip is under fabrication.1

Study and analysis of coefficient mismatch in a MASH21 sigma-delta modulator

The quantization noise leakage of the first stage in a MASH21 sigma–delta modulator is analyzed. The results show that the finite DC gain of the opamp is the main reason for noise leakage, and finite GBW and SR only generate harmonic distortion. The relationship between DC gain and leakage is modeled and conclusions on design criteria are reached. As an example, a MASH21 modulator for a digital audio application is realized. This modulator, fabricated in an 0.18 μm mixed signal process, achieves an SNDR of 91 dB with 1.8 V supply, which verifies the analysis and design criteria.

Research of micro-strip antenna array for anti-collision radar

This paper introduces a micro-strip antenna array applied to 24GHz anti-collision radar. The antenna module includes two 84-element micro-strip antenna arrays which both lay on RO5880 substrate. The simulated results show that the double antenna has gain of 26.5dB. Three-decibel bandwidth in azimuth is 6° and in elevation is 18°. The isolation between two antennas array is better than −32dB. The anti-collision radar has perfect performance.

Sigma–delta modulator modeling analysis and design

This paper introduces a new method for SC sigma-delta modulator modeling. It studies the integrators different equivalent circuits in the integrating and sampling phases. This model uses the OP-AMP input pairs tail current (I0/ and overdrive voltage (von/ as variables. The modulators static and dynamic errors are analyzed. A group of optimized I0 and von for maximum SNR and power area ratio can be obtained through this model. As examples, a MASH21 modulator for digital audio and a second order modulator for RFID baseband are implemented and tested, and they can achieve 91 dB and 72 dB respectively, which verifies the modeling and design criteria.

An RF power amplifier with inter-metal-shuffled capacitor for inter-stage matching in a digital CMOS process

One challenge of the implementation of fully-integrated RF power amplifiers into a deep submicro digital CMOS process is that no capacitor is available, especially no high density capacitor. To address this problem, a two-stage class-AB power amplifier with inter-stage matching realized by an inter-metal coupling capacitor is designed in a 180-nm digital CMOS process. This paper compares three structures of inter-metal coupling capacitors with metal-insulator-metal (MIM) capacitor regarding their capacitor density. Detailed simulations are carried out for the leakage, the voltage dependency, the temperature dependency, and the quality factor between an inter-metal shuffled (IMS) capacitor and an MIM capacitor. Finally, an IMS capacitor is chosen to perform the inter-stage matching. The techniques are validated via the design and implement of a two-stage class-AB RF power amplifier for an UHF RFID application. The PA occupies 370 × 200 μm2 without pads in the 180-nm digital CMOS process and outputs 21.1 dBm with 40% drain efficiency and 28.1 dB power gain at 915 MHz from a single 3.3 V power supply.