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Featured researches published by Fengqun Lang.


international conference on electronic packaging technology | 2012

High temperature resistant joint technology for SiC power devices using transient liquid phase sintering process

Fengqun Lang; Hiroshi Yamaguchi; Hiroshi Nakagawa; Hiroshi Sato

A high temperature resistant joint technology for bonding SiC power devices is developed using a transient liquid phase sintering (TLPS) process with a paste containing Cu and Sn powders with the size less than 15μm. The SiC devices are bonded to the Si<sub>3</sub>N<sub>4</sub>/Cu/Ni(P) substrate with the TLPS process at 260°C in a N<sub>2</sub> atmosphere for 20 minutes. The microstructure of the bond is mainly composed of Cu<sub>6</sub>Sn<sub>5</sub> and Cu phases, which is not molten up to 415°C. The joint strength at 300°C after sintering is 38MPa. During high temperature aging, the Cu<sub>6</sub>Sn<sub>5</sub> phase transforms to Cu<sub>3</sub>Sn, which is not molten up to 676°C. The joint strength increases with aging time due to the phase transition from Cu<sub>6</sub>Sn<sub>5</sub> to Cu<sub>3</sub>Sn and further sintering of Sn and Cu during high temperature aging. The joint strength at 300°C after aging at 300°C for 500h reaches approximate 50MPa. After thermal cycling test at -40~250 °C for 500 cycles, the joint strength is approximate 20MPa, which is 3 times higher than the joint strength standard.


Japanese Journal of Applied Physics | 2015

250 °C-Operated sandwich-structured all-SiC power module

Fumiki Kato; Rejeki Simanjorang; Fengqun Lang; Hiroshi Nakagawa; Hiroshi Yamaguchi; Hiroshi Sato

The operation of a sandwich structured all-SiC power module is demonstrated at 250 °C. The power module was designed by considering two thermal deformation issues. Thermally induced bending of the SiN-AMC substrates is reduced by introducing symmetrical Cu wiring patterns on both sides of the SiN ceramic plate. The concentration of stress located in the gate joint material is drastically reduced by introducing a trench structure in the Cu wiring layer of the gate interconnection. A double pulse test at a high temperature is carried out. At 250 °C, the all-SiC sandwich-structured power module was successfully operate at 600 V and 15 A. The maximum switching transient speed (dV/dt) of turn-on and turn-off are observed 10.7 and 12.1 V/ns, respectively.


IEEE Transactions on Advanced Packaging | 2009

A Novel Three-Dimensional Packaging Method for Al-Metalized SiC Power Devices

Fengqun Lang; Yusuke Hayashi; Hiroshi Nakagawa; Masahiro Aoyagi; Hiromichi Ohashi

A novel three-dimensional packaging method for Al-metalized SiC power devices has been developed by means of Au stud bumping technology and a subsequent vacuum reflow soldering process with Au-20Sn solder paste. Al-metalized electrodes of a SiC power chip can be robustly assembled to a direct bonded copper (DBC) substrate with this method. The bump shear strength of a Au stud bump on an Al electrode of a SiC chip increased with bonding temperature. The die shear strength of a SiC chip on the DBC substrate increased with the number of Au stud bumps which were preformed on the Al electrode. The bonded SiC-SBD chips on a DBC substrate were aged at 250degC in a vacuum furnace and the morphologies, die shear strength and electrical properties were investigated after a certain aging time. After 1000 h aging at 250degC, the electrical resistance of the bonded SiC-SBD chips only increased about 0.4%, the residual die shear strength was much higher than that of the IEC749 (or JEITA) standard value, and little morphological change was observed by a micro-focus X-ray TV system. Very little diffusion between Au stud bumps and Au-20Sn solder was observed by scanning electron microscope (SEM) equipped with an energy dispersed X-ray analyzer (EDX). Intermetallic compounds (IMC) evolved at the interface of chip/solder and chip/Au stud bumps after 1000 h aging at 250degC. With this method, power devices with Al bond pads can be three-dimensionally packaged.


electronics packaging technology conference | 2006

A novel chip joint method for high temperature operated SiC power modules

Fengqun Lang; Yusuke Hayashi; Hiroshi Nakagawa; Masahiro Aoyagi; Hiromichi Ohashi

A novel chip joint method for bonding SiC power device chips with Al metallized electrodes has been developed for three-dimensional (3D) packaging. This method is a combination of Au stud bumping on an Al metallized electrode of a power chip and subsequent reflow soldering with Au-20Sn solder. The die shear strength of a Au-stud-bumped SiC power device chip bonded on a AlN/Cu/Ni(Au) substrate with Au-20Sn solder reached up to 83.67MPa, which was about 5 times higher than that of a Au-stud-bumped chip bonded with Pb90-Sn solder. After shear test, the assembly fractured at the solder/substrate interface rather than at the solder/chip interface. This indicates that an Al metallized electrode of a power chip can be solidly assembled to a AlN/Cu/Ni(Au) substrate by Au stud bumps and Au-20Sn eutectic solder. After being aged at 200degC for 300 hrs, the resistance change of the bonded chips with Au-stud bumps and Au-20Sn solder was less than 6%. This proposed chip joint method presents a novel approach for 3D packaging high temperature operated SiC power modules.


Additional Conferences (Device Packaging, HiTEC, HiTEN, & CICMT) | 2013

Precise Chip Joint Method with Sub-micron Au Particle for High-density SiC Power Module Operating at High Temperature

Fumiki Kato; Fengqun Lang; Simanjorang Rejeki; Hiroshi Nakagawa; Hiroshi Yamaguchi; Hiroshi Sato

In this work, a novel precise chip joint method using sub-micron Au particle for high-density silicon carbide (SiC) power module operating at high temperature is proposed. A module structure of SiC power devices are sandwiched between two silicon nitride-active metal brazed copper (SiN-AMC) circuit boards. To make a precise position and height control of the chip bonding, the top side (gate/source or anode pad side) of SiC power devices are flip-chip bonded to circuit electrodes using sub-micron Au particle with low temperature (250°C) and pressure-less sintering. The accuracy of the bonding position of chips was less than 10 μm and the accuracy of the height after bonding chips was less than 15 μm. Mechanical shear fatigue tests for flip-chip bonded SiC Schottky barrier diode (SBD) were carried out. As a result, initial shear strength of the joint was 36 MPa. The shear strength of 43 MPa is obtained after storage life test (500 hours at 250°C), and also 35 MPa is obtained even after thermal cycle stress ...


IEEE Transactions on Components, Packaging and Manufacturing Technology | 2015

Deformation and Oxidation of Copper Metallization on Ceramic Substrate During Thermal Cycling From −40 °C to 250 °C

Fengqun Lang; Hiroshi Yamaguchi; Hiroshi Nakagawa; Hiroshi Sato

The active-metal-brazed copper (AMC) on Si3N4 ceramic substrate was used to fabricate the all-silicon carbide (SiC) high-temperature power modules. Its reliability was evaluated under the conditions of high-temperature storage (HTS) at 250 °C and thermal cycling test (TCT) from -40 °C to 250 °C. During HTS, the AMC substrate was stable without deformation of the Cu layer. The shear strength of the Au-Ge eutectic-bonded SiC power devices slowly decreased with storage time, from the original 83 to 60 MPa after 3000 h. During TCT, no detachment of the Cu layer was observed even after 3000 cycles. However, severe plastic deformation of the Cu layer, which was induced by the cyclic thermal stresses, was observed. The plastic deformation progressed as the number of the thermal cycles increased. The deformation of the Cu layer was described by the peak-valley distance Rz of the Cu layer. Rz increased with thermal cycles. The plastic deformation of the Cu layer fractured its Ni(P) top layer, resulting in oxidation wherein. The Cu deformation degraded the bonding interface of the device with the Au-Ge solder, leading to sharp decrease of the shear strength. Another type of degradation of the AMC substrate was proposed.


electrical design of advanced packaging and systems symposium | 2013

Development of SiC power module for high-speed switching operation

Hiroshi Sato; Fumiki Kato; Hiroshi Nakagawa; Hiroshi Yamaguchi; Simanjorang Rejeki; Fengqun Lang

In this work, SiC power module with sandwich structure is fabricated for high-speed switching operation at high temperature. A module structure of SiC power devices are sandwiched between two silicon nitride-active metal brazed copper circuit boards. To make a precise position and height control of the chip bonding, the top side (gate/source or anode pad side) of SiC power devices are flip-chip bonded to circuit electrodes using sub-micron Au particle with low temperature (250°C) and pressure-less sintering. The accuracy of the bonding position of chips was less than 10 μm and the accuracy of the height after bonding chips was less than 15 μm. The flip-chip bonding of SiC-JFET is successfully realized on the substrate without short or open failure electrically. Finally we joint the backside of the SiC-JFET (drain side) and the SiC-SBD (cathode side) to each circuit electrodes at once by means of reflow process with Au-12%Ge solder. Since the sandwitch module showed no fatigue afetr 500 times thermal cycle test between -40°C and 250°C and showed properly operation. The circuit operation of the module is confirmed by a double pulse-switching test.


international conference on electronics packaging | 2017

Thermal resistance evaluation of die-attachment made of nano-composite Cu/Sn TLPS paste in SiC power module

Fumiki Kato; Fengqun Lang; Hiroshi Nakagawa; Hiroshi Yamaguchi; Ryuuji Kimura; Keiji Okada; Hiroaki Shindo; Tatsuya Ooi; Rei Tamaki; Shigenobu Sekine; Hiroshi Sato

In this paper, we demonstrate a high heat resistant bonding method by Cu/Sn transient liquid phase sintering (TLPS) method can be applied to die-attachment of silicon carbide (SiC)-MOSFET in high temperature operation power module. The die-attachment is made of nano-composite Cu/Sn TLPS paste. The die shear strength was 40 MPa for 3 × 3 mm2 SiC chip after 1,000 cycles of thermal cycle testing between −40 °C and 250 °C. This indicated a high reliability of Cu/Sn die-attachment. The thermal resistance of the Cu/Sn die-attachment was evaluated by transient thermal analysis using a sample in which the SiC-MOSFET (die size: 4.04 × 6.44 mm2) was bonded with Cu/Sn die-attachment. The thermal resistance of Cu/Sn die-attachment was 0.13 K/W, which was comparable to the one of Au/Ge die-attachment (0.12 K/W). The validity of nano-composite Cu/Sn TLPS paste as a die-attachment for high-temperature operation SiC power module is confirmed.


electronics system integration technology conference | 2010

Effect of solder diffusion barriers on the joint reliability of SiC power devices operated above 300°C

Fengqun Lang; Hiromichi Oohashi; Hiroshi Yamaguchi

The SiC power devices can operate at high junction temperatures (Tj) as high as beyond 300°C and at high switching frequencies. The application of SiC devices in power electronics can improve the efficiency and can increase the power density of the converters. To realize the outstanding ability of the SiC devices, the high temperature packaging technology is crucial. The ceramic/Cu/Ni(P) is the standard substrate for power module packaging. The AuGe eutectic solder is the commonly used high temperature solder. However, this solder is prone to react with the Ni(P) layer, resulting in degradation of the joint. In order to solve this problem, we prepared two types of diffusion barrier on the surface of the package substrate: one is a thin TiN layer and the other is a thin W layer. The thickness of each diffusion barrier was 250 nm. The SiC Schottky Barrier Diode (SBD) power chips (2.0mm×2.0mm) were die-bonded on the modified package substrates with a vacuum reflow process. The bonded samples were aged at 330°C in air. The mechanical and electrical properties of the bonded samples were evaluated before and after the high temperature aging. The die shear strength of the SiC-SBD bonded on a non-modified package substrate dramatically decreased in the initial aging test stage, and decreased to less than one third of the initial value after 400 hrs. In contrast, the die shear strength of the SiC device bonded on the W-modified package substrate almost did not decrease after aging for 400 hrs. After 1000 hrs, the die shear strength was 2 times higher than that on the non-modified substrate. No change was observed in the electrical resistance after 1000 hrs. For the SiC devices bonded on the TiN-modified substrate, the electrical resistivity increased from 74 to 82.5 mΩ after aging for 1000 hrs. Decomposition of the TiN diffusion barrier was observed. The W diffusion barrier exhibits better result than the TiN diffusion barrier in improving the reliability of SiC power devices operated above 300°C.


Journal of Electronic Materials | 2011

Improvement in Joint Reliability of SiC Power Devices by a Diffusion Barrier Between Au-Ge Solder and Cu/Ni(P)-Metalized Ceramic Substrates

Fengqun Lang; Hiroshi Yamaguchi; Hiromichi Ohashi; Hiroshi Sato

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Hiroshi Yamaguchi

National Institute of Advanced Industrial Science and Technology

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Hiroshi Nakagawa

National Institute of Advanced Industrial Science and Technology

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Fumiki Kato

National Institute of Advanced Industrial Science and Technology

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Hiromichi Ohashi

National Institute of Advanced Industrial Science and Technology

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Masahiro Aoyagi

National Institute of Advanced Industrial Science and Technology

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Yusuke Hayashi

National Institute of Advanced Industrial Science and Technology

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Rejeki Simanjorang

National Institute of Advanced Industrial Science and Technology

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Hiromichi Oohashi

National Institute of Advanced Industrial Science and Technology

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