Fillia Makedon

On minimizing width in linear layouts

A (linear) layout of an undirected graph G is a one-to-one function mapping the vertices of G to integers. The cutwidth of G under a linear layout L, denoted by cw(G,L), is the maximum, taken over all possible i, of the number of edges connecting vertices assigned to integers less than i to vertices assigned to integers at least as large as i. The cutwidth of a graph G, denoted by cw(G), is the minimum of cw(G,L), taken over all possible linear layouts L. The problem of determining the cutwidth of a graph, called the Min Cut Linear Arrangement problem, has applications in VLSI, for example in the minimization of interconnection channels in Weinberger arrays [16].

Bandwidth Minimization: An approximation algorithm for caterpillars

The Bandwidth Minimization Problem (BMP) is the problem, given a graphG and an integerk, to map the vertices ofG to distinct positive integers, so that no edge ofG has its endpoints mapped to integers that differ by more thank. There is no known approximation algorithm for this problem, even for the case of trees. We present an approximation algorithm for the BMP for the case of special graphs, called caterpillars. The BMP arises from many different engineering applications which try to achieve efficient storage and processing and has been studied extensively, especially with relation to other graph layout problems. In particular, the BMP for caterpillars is related to multiprocessor scheduling. It has been shown to be NP-complete, even for degree-3 trees. Our algorithm, gives a logn times optimal algorithm, wheren is the number of nodes of the caterpillar. It is based on the idea of level algorithms.

Polynomial time algorithms for the MIN CUT problem on degree restricted trees

Polynomial algorithms are described that solve the MIN CUT LINEAR ARRANGEMENT problem on degree restricted trees. For example, the cutwidth or folding number of an arbitrary degree d tree can be found in O(n(logn)d-2) steps. This also yields an algorithm for determining the black/white pebble demand of degree three trees. A forbidden subgraph characterization is given for degree three trees having cutwidth k. This yields an interesting corollary: for degree three trees, cutwidth is identical to search number.

Approximating the minimum net expansion: Near optimal solutions to circuit partitioning problems

We address the problem of finding an approximation to the minimum net expansion (MNE) of a hypergraph H=(V, E h ), MNE is defined to be the minimum total weight of hyperedges with endpoints into two different sets divided by the number of nodes of the smaller set. We prove that a solution or a constant times optimal approximation to the optimization version of a multicommodity flow problem yields a logarithmic, to the number of nets, approximation of the minimum net expansion of the input hypergraph. This is a generalization of the result that Leighton and Rao proposed for graphs. Our flow problem can be solved or approximated to a constant factor of the optimal solution in polynomial time. Next, we show important applications of our result to achieve provably good solutions for a variety of partitioning and partitioning related problems on hypergraphs including bipartitioning, multiway partitioning and nonplanar net deletion. For several of the problems the solutions are within a polylogarithmic factor to the optimal solution.

Optimal-Algorithms for Multipacket Routing Problems on Rings

We study multipacket routing problems on rings of processors. We prove a new lower bound of 2n/3 routing steps for the case that k, the number of packets per processor, is at most 2. We also give an algorithm that tightens this lower bound. For the case where k > 2, the lower bound is kn/4. The trivial algorithm needs in the worst case k?n/2? steps to terminate. An algorithm that completes the routing in kn/4 + 2.5n routing steps is given.

Circuit partitioning into small sets: a tool to support testing with further applications

The authors consider a general partitioning problem, namely how to partition the elements of a circuit into sets of size less than a small constant, so that the number of nets which connect elements in different sets is minimized. One application is in the design for testability of VLSI chips and printed circuit boards. The authors consider two different versions of a bottom-up iterative approach. In the first version they present an efficient heuristic. In an alternative version, the heuristic is used as a subroutine to an approximation (provably good) algorithm, resulting in comparably good solutions. The authors compare both approaches with the familiar top-down approach which uses a well known bisection heuristic as a subroutine. These solutions outperform the top-down partitioning approach.<<ETX>>

Multipacket Routing on Rings

We study multipacket routing problems. We divide the multipacket routing problem into two classes, namely, distance limited and bisection limited routing problems. Then, we concentrate on rings of processors. Having a full understanding of the multipacket routing problem on rings is essential before trying to attack the problem for the more general case of r-dimensional meshes and tori. We prove a new lower bound of 2n/3 routing steps for the case of distance limited routing problems. We also give an algorithm that tightens this lower bound. For bisection limited problems, we present an algorithm that completes the routing in near optimal time.

ilona: an advanced cai tutorial system for the fundamentals of logic

Abstract An advanced tutorial system for teaching the fundamentals of logic has been developed to run on unix work stations and commonly available microcomputers. An important part of this tutorial is the intelligent problem solving environment which allows students to practise writing logical sentences in mathematical notation. A natural language system for intelligent logic narrative analysis ( ilona ) allows students to type in their own logical sentences in plain English and then have the computer check their working when they write these in mathematical form. ilona is an intelligent tutoring system which allows students a great deal of initiative in problem solving and provides a degree of flexibility in answer evaluation not found in traditional cai systems. The concepts and structures used in the development of ilona are easily transferable to other domains.

Iterative compaction: an improved approach to graph and circuit bisection

Given a graph G=(V,E), graph bisection is the problem of finding a partition of the vertex set V in two equal-sized subsets V/sub 1/ and V/sub 2/ so that the number of edges between them is minimized. This problem has important applications in circuit partitioning, testing, VLSI design and other network-related problems that apply the divide-and-conquer strategy. The authors introduce a new heuristic approach, called iterative compaction (IC), which employees a node degree based matching and iterative graph compaction. This gives a significant improvement over the performance of known bisection algorithms in both time and quality of the results.<<ETX>>

Efficient reconfiguration of WSI arrays

A new technique for efficient reconfiguration of large VLSI arrays suitable for wafer-scale integration (WSI) is introduced. Under the common assumption of uniformly distributed faults, the VLSI arrays are reconstructed in polynomial time using a matching technique first introduced by F.T. Leighton and P.W. Shor (1986). In addition, a randomized method for reducing the maximum wire length and the total wire length is developed and it is shown experimentally that the technique performs better than previous methods.<<ETX>>