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Dive into the research topics where Florent de Lamotte is active.

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Featured researches published by Florent de Lamotte.


design, automation, and test in europe | 2009

A co-design approach for embedded system modeling and code generation with UML and MARTE

Jorgiano Vidal; Florent de Lamotte; Guy Gogniat; Philippe Soulard; Jean-Philippe Diguet

In this paper we propose a UML/MDA approach, called MoPCoM methodology, to design high quality real-time embedded systems. We have defined a set of rules to build UML models for embedded systems, from which VHDL code is automatically generated by means of MDA techniques. We use the MARTE profile as an UML extension to describe real-time properties and perform platform modeling. The MoPCoM methodology defines three abstraction levels: abstract, execution and detailed modeling levels (AML, EML and DML, respectively). We detail the lowest MoPCoM level, DML, design rules in order to perform automatically VHDL code generation. A viterbi coder has been used as a first case study.


design, automation, and test in europe | 2010

UML design for dynamically reconfigurable multiprocessor embedded systems

Jorgiano Vidal; Florent de Lamotte; Guy Gogniat; Jean-Philippe Diguet; Philippe Soulard

In this paper we propose a design methodology to explore partial and dynamic reconfiguration of modern FPGAs. We improve an UML based co-design methodology to allow dynamic properties in embedded systems. Our approach targets MPSoPC (Multiprocessor System on Programmable Chip) which allows area optimization through partial reconfiguration without performance penalty. In our case area reduction is achieved by reconfiguring co-processors connected to embedded processors. Most of the system is automatically generated by means of MDE techniques. Our modeling approach allows designers to target dynamic reconfiguration without being expert of modern FPGAs as many implementation details are hidden during the modeling step. Such a methodology allows design time speedup and a significant reduction of the gap between hardware and software modeling. In order to validate our approach, an object tracking application has been implemented on a reconfigurable system composed of 4 embedded processors and 3 co-processors. Dynamic reconfiguration has been performed for one co-processor which dynamically implements 3 different computations.


international conference on microelectronics | 2009

IP reuse in an MDA MPSoPC co-design approach

Jorgiano Vidal; Florent de Lamotte; Guy Gogniat; Jean-Philippe Diguet; Philippe Soulard

With the increasing hardware capacity, embedded systems are becoming more and more complex, requiring new design techniques/methods. UML allows higher abstraction level system modeling and MDA techniques allow automatic code generation. In this paper we propose a UML/MDA approach to rapidly model and automatically generate MPSoPC systems. Our approach uses MARTE as extension mechanism in order to allow real-time and platform embedded systems modeling. Our goal is to provide an unique model for MPSoPC co-design, closing the gap between hardware and software modeling. Also, we propose an efficient method for IP (Intellectual Property) reuse allowing automatically platform code generation. Our tests have shown gains in the order of 30% in design time.


reconfigurable communication centric systems on chip | 2012

Designing formal reconfiguration control using UML/MARTE

Sébastien Guillet; Florent de Lamotte; Nicolas Le Griguer; Eric Rutten; Guy Gogniat; Jean-Philippe Diguet

This paper presents the first framework to design and synthesize a formal controller managing dynamic reconfiguration, using a Model Driven Engineering methodology base on an extension of UML/MARTE. The implementation technique highlights the combination of hard configuration constraints using weights (control part) - ensured statically and fulfilled by the managed system at runtime - and soft constraints (decision part) which, given a set of correct and accessible configurations, choose one of them. An application model of an image processing application is presented, then transformed and synthesized to be executed on a Xilinx platform to show how the controller, executed on a Microblaze, manages the hardware reconfigurations.


conference on automation science and engineering | 2009

Proactive remote healthcare based on multimedia and home automation services

Thi Bich Thanh Truong; Florent de Lamotte; Jean-Philippe Diguet

In the context of healthcare and the assistance of dependent people, this paper describes an original proactive solution for home monitoring. Our approach does not use any additional sensors and is only based on the observation of existing home automation events. An analysis of user habits is proposed to offer automatic scenarios which adapt to user capabilities. The simulation results, issued from previous experiments, show that our approach helps improve user autonomy while facilitating their use of daily services.


reconfigurable computing and fpgas | 2010

Modeling and Formal Control of Partial Dynamic Reconfiguration

Sébastien Guillet; Florent de Lamotte; Eric Rutten; Guy Gogniat; Jean-Philippe Diguet

This paper introduces an approach for the safe design and modeling of dynamically reconfigurable FPGA based Systems-on-Chip. This approach is carried out in a design framework, Gaspard2, dedicated to high-performance embedded systems modeling using the OMG standard profile UML/MARTE. Information employed by the reconfiguration mechanism is identified to be extracted from MARTE models in order to synthesize a controller using a formal technique which significantly simplifies the correct design of reconfiguration control. This methodology is then demonstrated in a case study.


field programmable technology | 2014

Extending UML/MARTE to Support Discrete Controller Synthesis, Application to Reconfigurable Systems-on-Chip Modeling

Sébastien Guillet; Florent de Lamotte; Nicolas Le Griguer; Eric Rutten; Guy Gogniat; Jean-Philippe Diguet

This article presents the first framework to design and synthesize a formal controller managing dynamic reconfiguration, using a model-driven engineering methodology based on an extension of UML/MARTE. The implementation technique highlights the combination of hard configuration constraints using weights (control part)—ensured statically and fulfilled by the system at runtime—and soft constraints (decision part) that, given a set of correct and accessible configurations, choose one of them. An application model of an image processing application is presented, then transformed and synthesized to be executed on a Xilinx platform to show how the controller, executed on a Microblaze, manages the hardware reconfigurations.


international conference of the ieee engineering in medicine and biology society | 2010

Alert management for home healthcare based on home automation analysis

Thi Bich Thanh Truong; Florent de Lamotte; Jean-Philippe Diguet; Farida Saïd-Hocine

Rising healthcare for elder and disabled people can be controlled by offering people autonomy at home by means of information technology. In this paper, we present an original and sensorless alert management solution which performs multimedia and home automation service discrimination and extracts highly regular home activities as sensors for alert management. The results of simulation data, based on real context, allow us to evaluate our approach before application to real data.


IFAC Proceedings Volumes | 2005

A MODEL FOR THE RECONFIGURATION OF MANUFACTURING SYSTEMS

Florent de Lamotte; Pascal Berruet; Jean-Luc Philippe

Abstract This paper proposes a state of the art about reconfigurable systems and underlines existing links in system reconfiguration in the domains of electronics, mobile robotics and manufacturing systems. Then a model for describing reconfigurable systems is introduced. In this model, described using MOF class diagrams, the architecture of the system and its configuration are separated. This model will then be usable by a reconfiguration manager.


design, automation, and test in europe | 2011

Dynamic applications on reconfigurable systems: From UML model design to FPGAs implementation

Jorgiano Vidal; Florent de Lamotte; Guy Gogniat; Jean-Philippe Diguet; Sébastien Guillet

In this paper we propose a design methodology to explore dynamic and partial reconfiguration (DPR) of modern FPGAs. We define a set of rules in order to model DPR by means of UML and design patterns. Our approach targets MPSoPC (Multiprocessor System on Programmable Chip) which allows: a) area optimization through partial reconfiguration without performance penalty and b) increased system flexibility through dynamic behavior modeling and implementation. In our case, area reduction is achieved by reconfiguring co-processors connected to embedded processors, and flexibility is achieved by permitting new behavior to be easily added to the system. Most of the system is automatically generated by means of MDE techniques. Our modeling approach allows designers to target dynamic reconfiguration without being experts of modern FPGAs. Such a methodology allows design time speed-up and a significant reduction of the gap between hardware and software modeling.

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Dive into the Florent de Lamotte's collaboration.

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Jean-Philippe Diguet

Centre national de la recherche scientifique

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Guy Gogniat

Centre national de la recherche scientifique

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Pascal Berruet

Centre national de la recherche scientifique

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Jorgiano Vidal

European University of Brittany

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Sébastien Guillet

European University of Brittany

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Jean-Luc Philippe

Centre national de la recherche scientifique

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Thi Bich Thanh Truong

Centre national de la recherche scientifique

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Gilberto Ochoa-Ruiz

Universidad Autónoma de Guadalajara

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Farida Saïd-Hocine

Centre national de la recherche scientifique

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Romain Bevan

Centre national de la recherche scientifique

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