Florian Broekaert

Low-power scheduling with DVFS for common RTOS on multicore platforms

This paper is on a low-power real-time scheduler integrated into a common Linux operating system. The low-power scheduler aims at reducing energy consumption in a system and uses Dynamic Voltage and Frequency Scaling (DVFS) to achieve its goal. The developed solution was implemented as a layer above the Linux OS scheduler. A framework was also developed to integrate the scheduler above Linux without modifying the kernel. We investigate the advantages, challenges, and viability of such a solution in the real-time embedded systems domain.

Improving the design flow for parallel and heterogeneous architectures running real-time applications

In this article, we present the work-in-progress of the EU FP7 PHARAON project, started in September 2011. The first objective of the project is the development of new techniques and tools capable to guide and assist the designer in the development process, from UML specifications to implementation and debug on multicore platform. This tool chain will offer the possibility to propose and implement several parallelization strategies and drive the designer into implementation steps. The second objective of the project is to develop monitoring and control techniques in the middleware of the system capable to automatically adapt platform services to applications requirements and therefore reduce power consumption in a transparent manner for applications.

A performance estimation flow for embedded systems with mixed software/hardware modeling

This paper introduces an Y-chart methodology for performance estimation based on high level models for both application and architecture. As embedded devices are more and more complex, the choice of the best suited architecture not only in terms of processing power but also in power consumption becomes a tedious task. In this context, estimation tools are key components in architecture choice methodology. Obtained results show an error margin of less than 13% of estimation performance for a H.264 video decoder application on two different hardware platforms.

A high level mixed hardware/software modeling framework for rapid performance estimation

This paper presents a high level mixed hardware/-software modeling framework for rapid performance estimation. Our approach deals with both mono-processor and multi-threaded application for multi-core processors. Mechanisms such as parallelism and preemption are handled to simulate the correct behavior of the architecture. Obtained results show an error margin of less than 20% of estimation performance for several applications running on different hardware platforms.

Waveperf: a benchmark generator for performance evaluation

Multi-core processors are more and more present in the embedded and real-time world. This paper introduces a code generator software applied to the benchmarking of embedded platforms. This solution creates an application runnable on embedded multicore platform and compliant with both POSIX or Xenomai interface. Running the application outputs an execution trace for each thread of the benchmark. It is also used to check the interruption latency and the preemption of real-time platforms.

Co-simulating complex energy harvesting WSN applications: an in-tunnel wind powered monitoring example

A complex wind-energy harvesting wireless sensor network WSN application for subway tunnels is pre-prototyped using the HarvWSNet co-simulation framework. Detailed models of every component, including energy harvester, tunnel propagation channel, train mobility, node power consumption, and physical layer PHY, medium access control MAC, routing and power aware protocols are described. Pre-prototyping simulations quickly identify the key parameters affecting the viability of the application e.g., harvested energy, train-induced signal attenuation. Thanks to its native capacity to handle detailed charge flow models, HarvWSNet can address scenarios with complex and intermittent energy supplies. This work demonstrates how co-simulation platforms such as HarvWSNet can aid in the development and future success of energy harvesting WSN applications.

EU FP7-288307 Pharaon Project: Parallel and Heterogeneous Architecture for Real-Time Applications

In this article, we present the work-in-progress of the EU FP7 PHARAON project, started in September 2011. The first objective of the project is the development of new techniques and tools capable to assist the designer in the development of parallel embedded systems, from executable specifications to target-specific implementation and debugging on a multicore platform. This tool chain will offer and implement several parallelization strategies, reflecting the functional and non-functional constraints of the system, and driving the designer into incremental parallelization and adaptation steps. The second objective of the project is to develop monitoring and control techniques in the middleware of the system capable to automatically adapt platform services to application requirements and therefore reduce power consumption transparently.