Florian G. Herrault
HRL Laboratories
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Featured researches published by Florian G. Herrault.
IEEE Magnetics Letters | 2013
Jooncheol Kim; Minsoo Kim; Florian G. Herrault; Jae Park; Mark G. Allen
The fabrication and characterization of highly laminated (~40 layers), thick (~40 μm) films of magnetically soft cobalt-nickel-iron are presented. Thick film fabrication is based on automated sequential electrodeposition of alternating CoNiFe and copper layers, followed by selective copper removal. The film, comprised tens of 1 μm thick laminations, exhibits saturation flux density of 1.8 T and coercivity of approximately 1.3 Oe. High-frequency film characterization took place in a 36-turn test inductor, which demonstrated constant inductance of 1.6 μH up to 10 MHz, indicating suppressed eddy-current loss. Quality factor exceeding 40 at 1 MHz, surpassing the performance of similarly fabricated Permalloy (Ni80Fe20) films.
intersociety conference on thermal and thermomechanical phenomena in electronic systems | 2014
Alexandros D. Margomenos; Florian G. Herrault; Eric M. Prophet; Miroslav Micovic; M. Yajima; C. Butler; K. Shinohara; David F. Brown; Andrea Corrion; A. Kurdoghlian; R. Bowen; Mike Wetzel; C. McGuire; Robert Grabar; D. H. Chow
We report a new wafer-level, low-cost, scalable RF front-end packaging approach that enables heterogeneous integration of GaN integrated circuits (IC) with other ICs (Si, SiGe, InP, GaAs etc) and RF passives in a 3D package that includes RF/DC interconnects and thermal management. This is achieved by forming a composite substrate utilizing double-side polished alumina wafers with embedded electroformed heat spreaders and through substrate vias. We call this composite substrate Integrated Thermal Array Plate (ITAP). Compared to conventionally mounted GaN power amplifier (PA) using AuSn and silver epoxy the ITAP pckaged X-band PA demonstrated 1.42x and 2x improvement in output power respectively (36.4 dBm, with 57% associated power added efficiency). By using a junction temperature (Tj) evaluation circuit we demonstrated that the ITAP reduces the Tj by 40° when the dissipated power is 2W/mm or increases the power handling by 1.45x when the Tj is held at 150°C. Using the same approach we are also reporting wafer-level packaged GaN power switches as well as thermal cycling and thermal shock test data that show no performance degradation.
international electron devices meeting | 2016
Miroslav Micovic; David F. Brown; D. Regan; Joel Wong; Yan Tang; Florian G. Herrault; Dayward Santos; Shawn D. Burnham; Joe Tai; Eric M. Prophet; Isaac Khalaf; C. McGuire; Hector Bracamontes; Helen Fung; A. Kurdoghlian; A. Schmitz
We provide an overview of key challenges and technical breakthroughs that led to development of highly scaled GaN HEMTs having ft > 400 GHz and fmax > 550 GHz and the corresponding IC process. These highly scaled GaN devices have 5 times higher breakdown voltage than transistors with similar high frequency RF power gain in other semiconductor systems (Si, SiGe, InP, GaAs). We also report performance of the first generation of MMIC power amplifiers (PAs) that utilize these highly scaled devices. The power added efficiency (PAE) of 59% measured at a frequency of 32 GHz, bias of 3 V and output power of 24.3 dBm of the first generation Ka-band MMIC PAs that were built using these highly scaled GaN devices, represent a significant improvement in PAE over values reported for other semiconductor technologies at this frequency band as well as for Ka-band MMICs built in lower frequency GaN nodes. Presented data suggest that highly scaled GaN transistors are excellent candidates for MMIC PAs for next generation 28 GHz, 39 GHz, and higher frequency 5G mobile bands, because they would greatly extend battery lifetime in mobile handsets, due to their superior PAE compared to competing semiconductor technologies.
electronic components and technology conference | 2015
Florian G. Herrault; Melanie S. Yajima; Alexandros D. Margomenos; Andrea Corrion; K. Shinohara; Miroslav Micovic
We present the fabrication and experimental characterization of wafer-level-packaged GaN power HEMTs incorporating embedded copper thermal heat spreader and microfabricated interconnects for GaN-based RF front-ends. The packaging fabrication technology mainly relies on silicon micromachining, metal electroplating, and thermocompression bonding. The presented packaging approach simultaneously addresses thermal management, electrical interconnects, performance, and has size and cost advantages over conventional assembly approaches. Silicon-packaged GaN-on-SiC power switches with slanted field plate technology demonstrated comparable DC IV characteristics with on-wafer measurements (threshold voltage = 0.3 V, static on-resistance = 2 Ω.mm measured at gate bias voltage of 1.5V, and drain and gate leakage current <; 10-6 A/mm at gate bias voltage of -2 V). The performance results of Si-packaged GaN devices were consistent with on-wafer measurements, indicating compatibility of the packaging technology with GaN power HEMTs.
Proceedings of SPIE | 2017
Jonathan J. Lynch; Florian G. Herrault; Keerti S. Kona; Gabriel Virbila; C. McGuire; Mike Wetzel; Helen Fung; Eric M. Prophet
HRL Laboratories has been developing a new approach for high resolution radar imaging on stationary platforms. High angular resolution is achieved by operating at 235 GHz and using a scalable tile phased array architecture that has the potential to realize thousands of elements at an affordable cost. HRL utilizes aperture coding techniques to minimize the size and complexity of the RF electronics needed for beamforming, and wafer level fabrication and integration allow tiles containing 1024 elements to be manufactured with reasonable costs. This paper describes the results of an initial feasibility study for HRL’s Coded Aperture Subreflector Array (CASA) approach for a 1024 element micromachined antenna array with integrated single-bit phase shifters. Two candidate electronic device technologies were evaluated over the 170 - 260 GHz range, GaN HEMT transistors and GaAs Schottky diodes. Array structures utilizing silicon micromachining and die bonding were evaluated for etch and alignment accuracy. Finally, the overall array efficiency was estimated to be about 37% (not including spillover losses) using full wave array simulations and measured device performance, which is a reasonable value at 235 GHz. Based on the measured data we selected GaN HEMT devices operated passively with 0V drain bias due to their extremely low DC power dissipation.
compound semiconductor integrated circuit symposium | 2016
Miro Micovic; David Brown; D. Regan; Joel Wong; Joe Tai; A. Kurdoghlian; Florian G. Herrault; Yan Tang; Shawn D. Burnham; Helen Fung; A. Schmitz; Isaac Khalaf; Dayward Santos; Eric M. Prophet; Hector Bracamontes; Charles McGuire; Robert Grabar
We report the first generation of GaN MMIC circuits that are based on the latest generation of (ft > 320 GHz and fmax > 580 GHz) [1] GaN Transistors. The reported broadband Ka-band (27 GHz - 40 GHz) GaN LNA MMICs have Noise Figure (NF) as low as 1 dB measured at a frequency of 37 GHz, NF <; 2 dB with >24dB of gain across 28 GHz- 39.2 GHz frequency range, and a very broad range of usable DC bias conditions (Vd: 0.6V - 4V; Pdc: 5 mW- 310 mW). This is to the best of our knowledge the lowest NF reported for GaN LNA in this frequency band.
Archive | 2014
Florian G. Herrault; Alexandros D. Margomenos; Miroslav Micovic; Melanie S. Yajima; Eric M. Prophet
Archive | 2017
Florian G. Herrault; Melanie S. Yajima
Archive | 2017
Florian G. Herrault; Miroslav Micovic
Archive | 2015
Florian G. Herrault; Melanie S. Yajima; Alexandros D. Margomenos