Francesco Piazza

A 20-mA-receive, 55-mA-transmit, single-chip GSM transceiver in 0.25-/spl mu/m CMOS

This paper presents a low-power 900-MHz GSM transceiver developed in a 0.25-/spl mu/m CMOS technology. The superhet receiver, with a single intermediate frequency at 71 MHz, has an overall worst case noise figure of 8.1 dB, including all filters. The overall gain can be digitally controlled over 98-dB range. The receiver consumes only 19.5 mA from the 2.5-V voltage supply while achieving the required blocking and intermodulation performance. The direct conversion transmitter has a fully integrated phase shifter and provides a 2-mW signal to the power amplifier with a low level of spurious emissions. The transmitted Gaussian minimum shift keying signal has an RMS average phase error <2/spl deg/, and the overall current consumption of the transmitter is 55 mA.

GSM transceiver front-end circuits in 0.25-μm CMOS

So far, CMOS has been shown to be capable of operating at RF frequencies, although the inadequacies of the device-level performance often have to be circumvented by innovations at the architectural level that tend to shift the burden to the circuit building blocks operating at lower frequencies. The RF front-end circuits presented in this paper show that excellent RF performance is feasible with 0.25 μm CMOS, even in terms of the requirements of the tried-and-true superheterodyne architecture. Design for low noise and low current consumption targeted for GSM handsets noise figures, a double-balanced mixer with 12.6dB SSB NF, as well as sub-25mA current consumption for the RF front-end (complete receiver), are among the main achievements.

A 1.57-GHz RF front-end for triple conversion GPS receiver

A low-power, 1.57 GHz RF front-end for a Global Positioning System (GPS) receiver has been designed in a 1.0 /spl mu/m BiCMOS technology. It consists of a low noise amplifier with 15 dB of gain, a single balanced mixer with 6.3 mS of conversion g/sub m/, a Colpitts LC local oscillator, and an emitter coupled logic (ECL) divide-by-eight prescaler. This front-end has a single sideband (SSB) noise figure of 8.1 dB and is part of a triple conversion superheterodyne receiver whose IF frequencies are 179, 4.7, and 1.05 MHz. Low power consumption has been achieved, with 10.5 mA at 3 V supply voltage for the front-end, while the complete receiver is expected to draw about 12 mA.

A 170 MHz RF front-end for ERMES pager applications

A 170 MHz RF front-end for ERMES pager applications has been implemented in a 1.2 /spl mu/m BiCMOS technology. The chip comprises a low noise amplifier with AGC, a double balanced mixer, a varactor tuned LC local oscillator, and an IF strip containing an AGC amplifier and a double balanced mixer with integrated active output filter. The LNA has a measured gain of 22.3 dB at 170 MHz with a usable AGC range of approximately 20 dB while the conversion transconductance of the mixer is 130 /spl mu/S. This front-end is suitable for direct conversion and superheterodyne pager receivers, and its noise figure is 6.2 dB. Low power operation has been achieved with the front-end drawing 230 /spl mu/A at 3 V, which is compatible with the intended application in wrist-watch style pagers.

A 20 mA-receive 55 mA-transmit GSM transceiver in 0.25 /spl mu/m CMOS

In a typical GSM handset, the battery takes as much as 20% of the cost, as well as volume and weight. Power consumption, which dictates the required battery size, is one of the most important considerations in design of transceiver ICs. Typical current consumption of BJT transceiver ICs reported in previous ISSCCs is 50 mA for 900 MHz GSM. This CMOS transceiver consumes less than 20 mA in the receive mode, despite the lower g/sub m//I ratio inherent to MOS transistors. Although external components are used where performance is critical, elimination of unnecessary passives makes their count low by present commercial standards. The receiver architecture is a single-IF (71MHz) superheterodyne, with interstage filter between the LNA and mixer for image reject and blocking performance. RF filter insertion losses make it necessary to have a LNA NF no more than 2dB and mixer NF no more than 15dB, to maintain 9dB overall receiver NF.