Francisco Argüello
University of Santiago de Compostela
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Featured researches published by Francisco Argüello.
IEEE Transactions on Communications | 1997
Montserrat Bóo; Francisco Argüello; Javier D. Bruguera; Ramón Doallo; Emilio L. Zapata
The Viterbi (1967) algorithm (VA) is known to be an efficient method for the realization of maximum-likelihood (ML) decoding of convolutional codes. The VA is characterized by a graph, called a trellis, which defines the transitions between states. To define an area efficient architecture for the VA is equivalent to obtaining an efficient mapping of the trellis. We present a methodology that permits the efficient hardware mapping of the VA onto a processor network of arbitrary size. This formal model is employed for the partitioning of the computations among an arbitrary number of processors in such a way that the data are recirculated, optimizing the use of the PEs and the communications. Therefore, the algorithm is mapped onto a column of processing elements and an optimal design solution is obtained for a particular set of area and/or speed constraints. Furthermore, the management of the surviving path memory for its mapping and distribution among the processors was studied. As a result, we obtain a regular and modular design appropriate for its VLSI implementation in which the only necessary communications between processors are the data recirculations between stages.
IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 1999
J.A. Hidalgo; Juan Torres López; Francisco Argüello; E.L. Zapata
We present an area-efficient parallel architecture that implements the constant-geometry, in-place Fast Fourier transform. It consists of a specific purpose processor array interconnected by means of a perfect unshuffle network. For a radix r transform of N=r/sup n/ data of size D and a column of P=r/sup p/ processors, each processor has only one local memory of N/rP words of size rD, with only one read port and one write port that, nevertheless, make it possible to read the r inputs of a butterfly and write r intermediate results in each memory cycle. The address generating circuit that permits the in-place implementation is simple and the same for all the local memories. The data how has been designed to efficiently exploit the pipelining of the processing section with no cycle loss. This architecture reduces the area by almost 50% of other designs with a similar performance.
IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing | 2014
Pablo Quesada-Barriuso; Francisco Argüello; Dora Blanco Heras
This paper deals with hyperspectral image classification in remote sensing. The proposed scheme is a spectral-spatial technique based on wavelet transforms and mathematical morphology. The original contribution of this paper is that the extended morphological profile (EMP) is created from the features extracted by wavelets, which has proven to be better or comparable to other techniques for dimensionality reduction of hyperspectral data. In addition, the hyperspectral image is denoised, also using wavelets, with the objective of removing undesirable artifacts introduced in the acquisition of the data. The classification is carried out by a support vector machine (SVM) classifier. The accuracy is improved when comparing with previously developed spectral-spatial SVM-based schemes.
IEEE Transactions on Parallel and Distributed Systems | 1992
Emilio L. Zapata; Francisco Argüello
An application-specific architecture for the parallel calculation of the decimation in time and radix 2 fast Hartley (FHT) and Fourier (FFT) transforms is presented. A real sequence with N=2/sup n/ data items is considered as input. The system calculates the FHT and the FFT in n and n+1 stages. respectively. The modular and regular parallel architecture is based on a constant geometry algorithm using butterflies of four data items and the perfect unshuffle permutation. With this permutation, the mapping of the algorithm in VLSI technology is simplified and the communications among processors are minimized. Organization of the processor memory based on first-in, first-out (FIFO) queues facilitates a systolic data flow and permits the implementation in a direct way of the complex data movements and address sequences of the transforms. This is accomplished by means of simple multiplexing operations, using hardwired control. The total calculation time is (Nlog/sub 2/N)/4Q cycles for the FHT and N(1+log/sub 2/N)/4Q cycles for the FFT, where Q is the number of processors (Q= 2/sup q/, Q >
Journal of remote sensing | 2014
Dora Blanco Heras; Francisco Argüello; Pablo Quesada-Barriuso
Among the different computational intelligence techniques avalaible for hyperspectral data classification, support vector machines (SVMs) have played a dominant role. Recently, a new learning algorithm for single-layer feedforward neural networks called the extreme learning machine (ELM) was proposed. This technique is competitive with SVMs in terms of accuracy, learning speed, and computational scalability. In this article, we propose and evaluate the use of ELM for land-cover classification from hyperspectral images. In addition, we consider two ELM-based techniques integrating spectral and spatial information of the image. The first is a scheme that uses a majority vote approach in order to combine the results of a pixel-wise spectral classification by ELM and a segmentation map obtained by a watershed algorithm. The second introduces spatial information from a small spatial neighbourhood after the classification by ELM. We show the usefulness of spatial–spectral ELM-based classification techniques in hyperspectral imaging. The results are compared to those obtained by similar SVM-based techniques and show improved classification results and much lower execution time. These simple and computationally cheap methods can be combined with others traditionally applied to hyperspectral images.
international conference on acoustics speech and signal processing | 1998
María A. Trenas; Juan Torres López; Emilio L. Zapata; Francisco Argüello
Real time image processing uses SIMD engines to accelerate the computation of algorithms such as the DCT, FFT or DWT. So, a good skewing scheme becomes essential for avoiding memory bank conflicts. A memory system is introduced for the efficient in-place computation of such transforms. It consists of M=2/sup m/ memory modules, providing parallel access to M image points whose patterns are a row or a column, the interval in both cases being 2/sup l/, l/spl ges/0. The efficiency of our design is proved through the computation of the 2D DWT.
IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing | 2015
Javier López-Fandiño; Pablo Quesada-Barriuso; Dora Blanco Heras; Francisco Argüello
Extreme learning machine (ELM) is an efficient learning algorithm that has been recently applied to hyperspectral image classification. In this paper, the first implementation of the ELM algorithm fully developed for graphical processing unit (GPU) is presented. ELM can be expressed in terms of matrix operations so as to take advantage of the single instruction multiple data (SIMD) computing paradigm of the GPU architecture. Additionally, several techniques like the use of ensembles, a spatial regularization algorithm, and a spectral-spatial classification scheme are applied and projected to GPU in order to improve the accuracy results of the ELM classifier. In the last case, the spatial processing is based on the segmentation of the hyperspectral image through a watershed transform. The experiments are performed on remote sensing data for land cover applications achieving competitive accuracy results compared to analogous support vector machine (SVM) strategies with significantly lower execution times. The best accuracy results are obtained with the spectral-spatial scheme based on applying watershed and a spatially regularized ELM.
The Computer Journal | 2001
Margarita Amor; Francisco Argüello; Juan Torres López; Oscar G. Plata; Emilio L. Zapata
This paper presents a general data-parallel formulation for a class of problems based on the divide and conquer strategy. A combination of three techniques—mapping vectors, index-digit permutations and space-filling curves—are used to reorganize the algorithmic dataflow, providing great flexibility to efficiently exploit data locality and to reduce and optimize communications. In addition, these techniques allow the easy translation of the reorganized dataflows into HPF (High Performance Fortran) constructs. Finally, experimental results on the Cray T3E validate our method.
IEEE Transactions on Signal Processing | 1993
E.L. Zapaga; Francisco Argüello
The successive doubling method is an efficient procedure for the design of fast algorithms for orthogonal transforms of length N=r/sup n/, where the radix r is a power of 2. A partitioned systolic architecture is presented for the two standard radix successive doubling algorithms: decimation in time (DIT) and decimation in frequency (DIF). The index space of the data is projected onto the index space associated with a column of processors, interconnected using a perfect unshuffle (DIT) or shuffle (DIF) interconnection network, defined by permutations of the order log/sub 2/r. The result is a partitioned systolic array with Q processors (Q=r/sup i/, 0 >
intelligent data acquisition and advanced computing systems: technology and applications | 2011
Dora Blanco Heras; Francisco Argüello; J. Lopez Gomez; J. A. Becerra; Richard J. Duro
In the quest for real time processing of hyperspectral images, this paper presents two artificial intelligence algorithms for target detection specially developed for their implementation over GPU and applied to a search-and-rescue scenario. Both algorithms are based on the application of artificial neural networks to the hyperspectral data. In the first algorithm the neural networks are applied at the level of individual pixels of the image. The second algorithm is a multiresolution based approach to scale invariant target identification using a hierarchical artificial neural network architecture. We have studied the main issues for the efficient implementation of the algorithms in GPU: the exploitation of thousands of threads that are available in this architecture and the adequate use of bandwidth of the device. The tests we have performed show both the effectiveness of detection of the algorithms and the efficiency of the GPU implementation in terms of execution times.