Franck Dahan

90nm low leakage SoC design techniques for wireless applications

The new generation of multimedia-application processors requires a drastic leakage reduction to bring the standby current to 50/spl mu/A. An efficient set of leakage reduction techniques, including power gating, memory retention, voltage scaling, and dual V/sub t/, is employed on a 50M transistor, 80mm/sup 2/ IC, fabricated in a 90nm CMOS technology, resulting in a 40/spl times/ leakage reduction.

A 65-nm Mobile Multimedia Applications Processor with an Adaptive Power Management Scheme to Compensate for Variations

In this paper we present the SmartReflextrade power management techniques implemented on the OMAP3430 Mobile Multimedia Applications Processor. By using multiple voltage domains, fine grain power domains, split-rail memories, and adaptive compensation, SoC active power reduction of 66% and leakage power reduction of 2~3 orders of magnitude was achieved. OMAP3430 contains more than 150M transistors.

Generic thermal analysis for phone and tablet systems

Thermal management of handheld systems such as smart phones and tablet systems is becoming increasingly challenging due to increasing power dissipation. These mobile systems pose a significant challenge for implementation of traditional cooling schemes such as heat sinks and fans due to form factor limitations. Instead, new advanced cooling schemes have been developed. This article presents thermal model development from an analysis of todays smart phone thermal management schemes and application of these techniques to a tablet system. Application processor temperature rise and tablet skin temperature are reported for thermal enhancement simulations using this tablet system. Some guiding principles are provided for efficient thermal design of handheld systems.

A design platform for 90-nm leakage reduction techniques

Methodology, EDA flow, scripts, and documentation play a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on leakage reduction techniques but also on their deployment as a worldwide infrastructure as the added-value resides not only in the techniques themselves but also in the way they are implemented to build an efficient, re-usable, robust, low cost and portable platform. Techniques have been silicon proven on the 90-nm TI CMOS technology and is commonly used to design SoC with complexities over 100 million transistors.