Frank J. Ruess

Atomically precise placement of single dopants in si.

We demonstrate the controlled incorporation of P dopant atoms in Si(001), presenting a new path toward the creation of atomic-scale electronic devices. We present a detailed study of the interaction of PH3 with Si(001) and show that it is possible to thermally incorporate P atoms into Si(001) below the H-desorption temperature. Control over the precise spatial location at which P atoms are incorporated was achieved using STM H lithography. We demonstrate the positioning of single P atoms in Si with approximately 1 nm accuracy and the creation of nanometer wide lines of incorporated P atoms.

Progress in silicon-based quantum computing

We review progress at the Australian Centre for Quantum Computer Technology towards the fabrication and demonstration of spin qubits and charge qubits based on phosphorus donor atoms embedded in intrinsic silicon. Fabrication is being pursued via two complementary pathways: a ‘top–down’ approach for near–term production of few–qubit demonstration devices and a ‘bottom–up’ approach for large–scale qubit arrays with sub–nanometre precision. The ‘top–down’ approach employs a low–energy (keV) ion beam to implant the phosphorus atoms. Single–atom control during implantation is achieved by monitoring on–chip detector electrodes, integrated within the device structure. In contrast, the ‘bottom–up’ approach uses scanning tunnelling microscope lithography and epitaxial silicon overgrowth to construct devices at an atomic scale. In both cases, surface electrodes control the qubit using voltage pulses, and dual single–electron transistors operating near the quantum limit provide fast read–out with spurious–signal rejection.

Scanning probe microscopy for silicon device fabrication

We present a review of a detailed fabrication strategy for the realisation of nano and atomic-scale devices in silicon using phosphorus as a dopant and a combination of ultra-high vacuum scanning probe microscopy and silicon molecular beam epitaxy (MBE). In this work we have been able to overcome some of the key fabrication challenges to the realisation of atomic-scale devices including the identification of single P dopants in silicon, the controlled incorporation of P atoms in silicon with atomic precision and the minimisation of P segregation and diffusion during Si encapsulation. Recently, we have combined these results with a novel registration technique to fabricate robust electrical devices in silicon that can be contacted and measured outside the ultra-high vacuum environment. We discuss the importance of our results for the future fabrication of atomic-scale devices in silicon.

Atomic-scale silicon device fabrication

The driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce device sizes below 10 nm. In this paper we demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity crystal growth. Using this process we have fabricated conducting nanoscale wires with widths down to ∼8 nm, and arrays of P-doped dots in silicon. We will present an overview of devices that have been made with this technology and highlight some of the detailed atomic level understanding of the doping process developed towards atomically precise devices.

Use of a scanning electron microscope to pattern large areas of a hydrogen resist for electrical contacts

We use scanning tunneling microscopy to investigate the atomic-scale process of hydrogen desorption from H:Si(001) with a 25keV scanning electron microscope (SEM) electron beam and characterize the rate of desorption, contaminant deposition, and desorption straggle. We then demonstrate the effectiveness of a SEM to pattern a hydrogen resist for device fabrication by showing that it is compatible with phosphine (PH3) dosing to form large (4×4μm2) buried planar conducting regions in silicon.

Atomically precise silicon device fabrication

An important driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce devices below 10 nm. We demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity, low temperature crystal growth. A major advantage of this strategy is the ability to investigate the role of dopant placement and atomically controlled growth on electronic device operation.

The fabrication of devices in silicon using scanning probe microscopy

Over the last three years we have demonstrated key milestones in the fabrication of buried nano-scale devices in silicon using an ultra-high vacuum scanning tunnelling microscope (STM) and silicon molecular beam epitaxy (MBE). Recently we have achieved the final step of connecting the STM-patterned buried phosphorus devices to the outside world to perform electrical measurements. The results of our low temperature magnetotransport measurements highlight the potential of this approach for the creation of atomic-scale devices.

Minimisation of P surface segregation during epitaxial silicon growth for the fabrication of a silicon-based quantum computer

To optimise the fabrication process for a silicon based quantum computer the surface segregation/diffusion of phosphorus atoms in silicon is investigated on an atomic scale using scanning tunnelling microscopy (STM) after epitaxial silicon growth at 255 /spl deg/C and room temperature, respectively. The phosphorus atom in the Si(001) surface forms a silicon-phosphorus heterodimer identified as a bright zigzag feature in filled state STM images. Sample annealing, used to reduce the surface roughness and the defect density after silicon growth is shown to increase the density of phosphorus atoms at the surface. However, the density of phosphorus atoms can be limited to a few percent of the initial density if the phosphorus atoms are encapsulated in silicon at room temperature.