T. C. G. Reusch

Atomic-Scale, All Epitaxial In-Plane Gated Donor Quantum Dot in Silicon

Nanoscale control of doping profiles in semiconductor devices is becoming of critical importance as channel length and pitch in metal oxide semiconductor field effect transistors (MOSFETs) continue to shrink toward a few nanometers. Scanning tunneling microscope (STM) directed self-assembly of dopants is currently the only proven method for fabricating atomically precise electronic devices in silicon. To date this technology has realized individual components of a complete device with a major obstacle being the ability to electrically gate devices. Here we demonstrate a fully functional multiterminal quantum dot device with integrated donor based in-plane gates epitaxially assembled on a single atomic plane of a silicon (001) surface. We show that such in-plane regions of highly doped silicon can be used to gate nanostructures resulting in highly stable Coulomb blockade (CB) oscillations in a donor-based quantum dot. In particular, we compare the use of these all epitaxial in-plane gates with conventional surface gates and find superior stability of the former. These results show that in the absence of the randomizing influences of interface and surface defects the electronic stability of dots in silicon can be comparable or better than that of quantum dots defined in other material systems. We anticipate our experiments will open the door for controlled scaling of silicon devices toward the single donor limit.

Scanning probe microscopy for silicon device fabrication

We present a review of a detailed fabrication strategy for the realisation of nano and atomic-scale devices in silicon using phosphorus as a dopant and a combination of ultra-high vacuum scanning probe microscopy and silicon molecular beam epitaxy (MBE). In this work we have been able to overcome some of the key fabrication challenges to the realisation of atomic-scale devices including the identification of single P dopants in silicon, the controlled incorporation of P atoms in silicon with atomic precision and the minimisation of P segregation and diffusion during Si encapsulation. Recently, we have combined these results with a novel registration technique to fabricate robust electrical devices in silicon that can be contacted and measured outside the ultra-high vacuum environment. We discuss the importance of our results for the future fabrication of atomic-scale devices in silicon.

Scanning tunneling microscope based fabrication of nano- and atomic scale dopant devices in silicon: The crucial step of hydrogen removal

The use of a scanning tunneling microscope (STM) to pattern a hydrogen resist on the Si(001) surface has recently become a viable route for the fabrication of nanoscale planar doped devices in silicon. A crucial step in this fabrication process is the removal of the hydrogen resist after STM patterning before Si encapsulation of the dopants via molecular beam epitaxy. We compare thermal and STM-stimulated hydrogen desorptions in terms of surface morphology and integrity of dopant nanostructures embedded in the surface. We find that the boundaries of STM patterned P-in-Si nanostructures are maintained by STM-stimulated hydrogen desorption. In comparison, for an optimized thermal annealing at 470°C for 15s to remove the hydrogen there is a lateral diffusion out of the nanostructured region of up to ∼7–8nm. Our results demonstrate the advantages of nonthermal hydrogen desorption for the preservation of atomic scale dopant patterns in silicon.

Atomic-scale silicon device fabrication

The driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce device sizes below 10 nm. In this paper we demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity crystal growth. Using this process we have fabricated conducting nanoscale wires with widths down to ∼8 nm, and arrays of P-doped dots in silicon. We will present an overview of devices that have been made with this technology and highlight some of the detailed atomic level understanding of the doping process developed towards atomically precise devices.

Narrow, highly P-doped, planar wires in silicon created by scanning probe microscopy

We demonstrate the use of a scanning tunnelling microscope (STM) to pattern buried, highly planar phosphorus-doped silicon wires with widths down to the sub-10 nm level. We confirm the structural integrity of these wires using both buried dopant imaging techniques and ex situ electrical characterization. Four terminal I–V characteristics at 4 K show ohmic behaviour for all wires with resistivities between 1 and 24 × 10−8 Ω cm. Magnetotransport measurements reveal that conduction is dominated by disordered scattering with quantum corrections consistent with 2D weak localization theory. Our results show that these quantum corrections become more pronounced as the electron phase coherence length approaches the width of the wire.

Surface gate and contact alignment for buried, atomically precise scanning tunneling microscopy–patterned devices

The authors have developed a complete electron beam lithography (EBL)-based alignment scheme for making multiterminal Ohmic contacts and gates to buried, planar, phosphorus-doped nanostructures in silicon lithographically patterned by scanning tunneling microscopy (STM). By prepatterning a silicon substrate with EBL-defined, wet-etched registration markers, they are able to align macroscopic contacts to buried, conducting STM-patterned structures with an alignment accuracy of ∼100nm. A key aspect of this alignment process is that, by combining a circular marker pattern with step engineering, they are able to reproducibly create atomically flat, step-free plateaus with a diameter of ∼300nm so that the active region of the device can be patterned on a single atomic Si(100) plane at a precisely known position. To demonstrate the applicability of this registration strategy, they show low temperature magnetoresistance data from a 50nm wide phosphorus-doped silicon nanowire that has been STM-patterned onto a si...

Electrical Characterization of Ordered Si:P Dopant Arrays

We report on the ability to fabricate arrays of planar, nanoscale, highly doped phosphorus dots in silicon separated by source and drain electrodes using scanning tunneling microscope lithography. We correlate ex situ electrical measurements with scanning tunneling microscope (STM) images of these devices and show that ohmic conduction can be achieved through the disordered array with a P coverage of 0.8times1014 cm-2. In comparison, we show that an ordered array of P dots ~6 nm in diameter and containing ~50 P atoms separated by ~4 nm shows nonlinear I-V, characteristic of a series of metallic dots separated by tunnel barriers. These results highlight the use of STM lithography to pattern ordered dopants in silicon down to the sub-10 nm scale

Single P and As dopants in the Si(001) surface

Using first-principles density functional theory, we discuss doping of the Si(001) surface by a single substitutional phosphorus or arsenic atom. We show that there are two competing atomic structures for isolated Si-P and Si-As heterodimers, and that the donor electron is delocalized over the surface. We also show that the Si atom dangling bond of one of these heterodimer structures can be progressively charged by additional electrons. It is predicted that surface charge accumulation as a result of tip-induced band bending leads to structural and electronic changes of the Si-P and Si-As heterodimers which could be observed experimentally. Scanning tunneling microscopy (STM) measurements of the Si-P heterodimer on a n-type Si(001) surface reveal structural characteristics and a bias-voltage dependent appearance, consistent with these predictions. STM measurements for the As:Si(001) system are predicted to exhibit similar behavior to P:Si(001).

Reaction paths of phosphine dissociation on silicon (001)

Using density functional theory and guided by extensive scanning tunneling microscopy (STM) image data, we formulate a detailed mechanism for the dissociation of phosphine (PH3) molecules on the Si(001) surface at room temperature. We distinguish between a main sequence of dissociation that involves PH2+H, PH+2H, and P+3H as observable intermediates, and a secondary sequence that gives rise to PH+H, P+2H, and isolated phosphorus adatoms. The latter sequence arises because PH2 fragments are surprisingly mobile on Si(001) and can diffuse away from the third hydrogen atom that makes up the PH3 stoichiometry. Our calculated activation energies describe the competition between diffusion and dissociation pathways and hence provide a comprehensive model for the numerous adsorbate species observed in STM experiments.

Morphology and electrical conduction of Si:P δ-doped layers on vicinal Si(001)

We present a combined scanning tunneling microscopy (STM) and low-temperature magnetotransport study of Si:P δ-doped layers on vicinal Si(001) substrates. The substrates were misoriented 4° toward [110] resulting in a high step density on the starting growth surface. Atomically resolved STM was used to study all stages of the fabrication. We find only a weak influence of the high step density and discuss the implications for the fabrication δ-doped layers and planar nanoscale Si:P devices by scanning tunneling lithography.