Frederic Dross

Design, fabrication and optical characterization of photonic crystal assisted thin film monocrystalline-silicon solar cells.

In this paper, we present the integration of an absorbing photonic crystal within a monocrystalline silicon thin film photovoltaic stack fabricated without epitaxy. Finite difference time domain optical simulations are performed in order to design one- and two-dimensional photonic crystals to assist crystalline silicon solar cells. The simulations show that the 1D and 2D patterned solar cell stacks would have an increased integrated absorption in the crystalline silicon layer would increase of respectively 38% and 50%, when compared to a similar but unpatterned stack, in the whole wavelength range between 300 nm and 1100 nm. In order to fabricate such patterned stacks, we developed an effective set of processes based on laser holographic lithography, reactive ion etching and inductively coupled plasma etching. Optical measurements performed on the patterned stacks highlight the significant absorption increase achieved in the whole wavelength range of interest, as expected by simulation. Moreover, we show that with this design, the angle of incidence has almost no influence on the absorption for angles as high as around 60°.

High-quality epitaxial foils, obtained by a layer transfer process, for integration in back-contacted solar cells processed on glass

Foil creation by lifting off a thin layer of a high quality silicon substrate is one of the promising substitutes for wafer sawing to create substrates thinner than 100 μm. The porous silicon-based layer transfer process is a well known method to obtain high quality foils. Despite a number of convincing lab-based solar cell show-cases, there is no breakthrough of this technology at (semi)-industrial level, because of the poor yield of processing free standing foils. This paper presents a method to fabricate back contacted solar cells based on epitaxial foils avoiding processes on free-standing foils. First, a porous silicon layer is electrochemically etched, acting as a weak sacrificial layer to detach the foil that is epitaxially grown on top of the porous silicon layer. Characterization of the epitaxial foils shows a good crystalline quality and an effective lifetime around 100 μs. Those results give indications that the obtained foils are well suited for solar cell fabrication. Front-side processing is done while the epitaxial foil is still attached to its parent substrate. A good yield is obtained for epitaxial foils that underwent the front-side processing sequence consisting of wet chemical texturing, FSF formation, passivation and ARC deposition. Afterwards, the front-side of the foil is bonded to a glass carrier and the foil is detached from its parent substrate. Silicone adhesives are used for this permanent bond. The rear-side of the solar cell is processed while bonded to glass. Therefore, only low temperature processes (<;200°C) can be used. So far, the rear-side processing sequence was performed on Float-zone reference wafers as a proof of concept resulting in a confirmed maximum efficiency of 18.4%. The rear-side processing sequence still needs to be applied on epitaxial foils.

Impact of Rear-Surface Passivation on MWT Performances

Back-contact metal-wrap-through (MWT) solar cells are very attractive for implementation into industrial production lines. They combine the advantages of back-contact cells and the potential of easy integration into the production lines of standard cells. Nonetheless, they tend to show lower fill factors and open-circuit voltages than conventional cells. This is attributed to a non-linear shunt behavior under the emitter busbars and is believed to arise from a too-deep penetration of the silver paste printed on the emitter region on the rear during the firing step. In order to improve the MWT solar cells performances, we propose to deposit on the rear-surface a full coverage layer of a dielectric material. This layer is used first to protect the emitter during the firing step; but if it is smartly chosen, it can also be used as passivating layer for the base surface. In this work, we have processed 12.5times12.5 cm2 mc-Si wafers into 220-mum-thick MWT cells, including the deposition of a passivating dielectric layer on the rear surface. By means of dark lock-in thermography measurements, we observe that the shunting effect in the resulting cells is greatly reduced compared to neighboring cells processed into MWT with an Al-BSF rear-surface passivation. The dielectric plays in addition its role of surface passivation, according to the nearly 7 mV increase observed on the open-circuit voltage even on thick wafers. We also observe a 1.4% FF absolute increase, resulting in a 0.6% absolute efficiency increase

Interface nature of oxidized single-crystal arrays of etched Si nanowires on (100)Si

Low temperature electron spin resonance studies have been carried out on single crystalline arrays of sub-10 nm Si nanowires (NWs) manufactured on (100)Si by top down etching and oxidation thinning. This reveals the presence of a substantial inherent density of Pb0 (Si3 ≡ Si•) defects (traps) at the NW Si/SiO2 interfaces, due to particular faceting and enhanced interface strain, leaving NW interfaces of reduced electrical quality. Perusal of the specific properties of the occurring Pb-type defect system points to a nanopillar morphology compatible with NWs predominantly bordered by {110} facets, with cross sectional shape of 〈100〉 truncated {110} squares. The inherent interface quality appears limited by the wire-narrowing thermal oxidation procedure.

All-aluminum screen-printed IBC cells: Design concept

A design concept supported by numerical device modeling is presented for a p-type IBC cell with screen-printed aluminum for both contact polarities. Applying such a design to Cz silicon appears to offer cell efficiency exceeding 20%. The key enabling feature for this design is cleaving each cell into strips held together by tape. These strips are then connected electrically in series using extrusion printing after the strips are laminated to the module glass. The resulting module technology is called SPLICE, for “Screen Printed Locally Interdigitated Contact Elements”.

Design and fabrication of photonic crystals in epitaxial free silicon for ultrathin solar cells

In this paper, we present the integration of an absorbing photonic crystal within a thin film photovoltaic solar cell. Optical simulations performed on a complete solar cell revealed that patterning the epitaxial crystalline silicon active layer as a 1D and 2D photonic crystal enabled to increase its integrated absorption by 37%abs and 68%abs between 300 nm and 1100 nm, compared to a similar but unpatterned stack. In order to fabricate such promising cells, a specific fabrication processes based on holographic lithography, inductively coupled plasma etching and reactive ion etching has been developed and implemented to obtain ultrathin patterned solar cells.

Thermal curing of crystallographic defects on a slim-cut silicon foil

The SLIM-Cut method [1] addresses one of the most important challenges of crystalline-Si for photovoltaics: kerf-free wafering of substrates as thin as 50 microns. The SLIM-Cut technology is fully based on mechanical stress and it is compatible with low-cost fabrication methods: a stress field is applied to a silicon wafer so that a crack propagates in the silicon substrate parallel to the surface at a given depth. The top silicon layer is separated from the parent substrate and processed into a solar cell.

Ion implantation as a potential alternative for the formation of Front Surface Fields for IBC silicon solar cells

Interdigitated back contacted cells (IBC) constitute an excellent option for the achievement of high-efficiency on silicon material [1,2]. The effective implementation of an electrical field on the front side, also called Front Surface Field (FSF) is beneficial for this cell concept. It contributes to the reduction of the recombination and the enhancement of the lateral conductivity, improving the cell efficiency [3]. The ideal FSF would push the minority carriers away, while restricting the Auger-recombination-active region to a minimal depth. In addition, too high doping leads to increased absorption in a highly-recombinative region, due to bandgap narrowing. Therefore, a trade-off should be achieved in an n-type IBC solar cell by the combination of a highly-doped n+ surface with a shallow doping profile.

Improvement in Al-Alloyed emitter of rear-junction n-type mc-si cells using a stack of pure Al and screen-printed Al paste

Significant improvements in the fill factor and open circuit voltage of large area (>100 cm2) n-type mc-Si rear-junction cells have been obtained using a stack of pure Al and screen-printed Al paste. The Al-alloyed emitter of the cells was improved by using a thin 1–2 micron sputtered or evaporated Al layer under screen-printed Al paste. The process sequence that was used involved minor modifications to the industrial process for p-type cells which uses Al-alloying as back surface field. Adding a pure Al layer under screen-printed Al-paste led to large increase in shunt resistance of the cells, especially when a low quantity of screen-printed paste was used. Significant improvement in FF (from 46 % to 76 %) and Voc (from 480 mV to 610 mV) were obtained by using stack of 2 µm of pure Al under ∼ 5 mg/cm2 screen-printed Al paste. Furthermore, very high fill factors up to 82.2 % were obtained using a 1-µm sputtered Al layer under ∼ 10 mg/cm2 screen-printed Al layer. The improvements were made possible by reduction in discontinuities (shunts) in Al-alloyed junction.

15% multicrystalline n-type silicon screen-printed solar cells with Al-alloy emitter

Long diffusion length is essential to reach high efficiencies (≫15%) on rear-junction solar cells. As a rule of thumb the minority carrier diffusion length should be at least three times as long as the wafer thickness. Thanks to the smaller capture cross-section of impurities measured in n-type material, n-type silicon can exhibit a diffusion length exceeding 600 μm even in its multi-crystalline form. High-efficiency rear-junction cells become feasible at reasonable cost with wafers as thick as 200 μm. The development of the p+ emitter on the rear is essential for this type of cell, and Al alloying is one of the techniques of choice to realize it. After optimizing the emitter, we obtained very good values for Voc (∼615 mV) and FF (≫80%). Afterwards, focus was laid on improving the short-circuit current. This was achieved by an optimization of the phosphorus-diffused front-surface field, and by thinning down the wafers. These two actions had the consequence of increasing independently of each other the Jsc by 2.3 mA.cm−2 for the optimization of the front-surface field, and by 3 mA.cm−2 when wafer thickness decreased from 300 μm to 150 μm. The characteristics obtained are observed to be extremely dependent on the wafer quality, which varies a lot along the ingot. An efficiency of 15.0% (30.7 mA.cm−2) was reached on rear-junction n-type 150-μm-thick 5×5-cm2 2.5-ohms.cm multi-crystalline Si.